Freescale Semiconductor MPC5565, Reference Manual

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Reset
MPC5565 Microcontroller Reference Manual, Rev. 1.0
4-16 Freescale Semiconductor
If the RCHW stored in either internal or external flash is invalid (boot identifier field of RCHW is not
0x5A), or if BOOTCFG[0] negates and BOOTCFG[1] asserts when RSTOUT negates, then RCHW is not
applicable, and serial boot mode is invoked.
Table 4-10 summarizes the RCHW location options.
4.4.4 Reset Configuration Timing
The timing diagram in Figure 4-4 shows the sampling of the BOOTCFG[0:1], WKPCFG, and
PLLCFG[0:1] pins for a power-on reset. The timing diagram is also valid for internal/external resets
assuming that V
DD,
V
DDSYN,
and V
DDEH6
are within valid operating ranges. The values of the
PLLCFG[0:1] pins are latched at the negation of the RSTOUT pin, if the RSTCFG pin is asserted at the
negation of RSTOUT. The value of the WKPCFG signal is applied at the assertion of the internal reset
signal (as indicated by the assertion of RSTOUT). The values of the WKPCFG and BOOTCFG[0:1] pins
are latched 4 clock cycles before the negation of RSTOUT and stored in the reset status register
(SIU_RSR). BOOTCFG[0:1] are latched only if RSTCFG is asserted. WKPCFG is not dependent on
RSTCFG.
Table 4-10. Reset Configuration Halfword Sources
RSTCFG BOOTCFG[0] BOOTCFG[1]
Boot Identifier
Field
(RCHW)
Boot Mode Configuration Word Source
1 — —
Valid Internal
The lowest address of one of the six low address
spaces (LAS) in internal flash memory.
Invalid Serial Not applicable
0 0 0
Valid Internal
The lowest address of one of the six low address
spaces (LAS) in internal flash memory.
Invalid Serial Not applicable
0 0 1 — Serial Not applicable
0 1 0
Valid
External boot,
no arbitration The lowest address (0x0000_0000) of an external
memory device, enabled by chip select CS[0] using
either 16- or 32-bit data bus.
Invalid Serial Not applicable
0 1 1 External arbitration not supported