Freescale Semiconductor MPC5565, Reference Manual

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Deserial Serial Peripheral Interface (DSPI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 19-9
19.3.2 Register Descriptions
19.3.2.1 DSPI Module Configuration Register (DSPI x _MCR)
The DSPI x _MCR contains bits which configure attributes of the DSPI operation. The values of the HALT
and MDIS bits can be changed at any time, but their effect begins on the next frame boundary. The HALT
and MDIS bits in the DSPI
x _MCR are the only bit values software can change while the DSPI is running.
The following table describes the fields in the DSPI module configuration register:
Base + 0x00BC DSPI x _DSICR DSPI DSI configuration register 32
Base + 0x00C0 DSPI x _SDR DSPI DSI serialization data register 32
Base + 0x00C4 DSPI x _ASDR DSPI DSI alternate serialization data register 32
Base + 0x00C8 DSPI x _COMPR DSPI DSI transmit comparison register 32
Base + 0x00CC DSPI x _DDR DSPI DSI deserialization data register 32
Address: Base + 0x0000 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
MSTR
CONT_
SCKE
DCONF FRZ MTFE
PCS
SE
RO
OE
0 0
PCSI
S5
PCSI
S4
PCSI
S3
PCSI
S2
PCSI
S1
PCSI
S0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
MDIS
DIS_
TXF
DIS_
RXF
CLR_
TXF
CLR_
RXF
SMPL_PT
0 0 0 0 0 0 0
HALT
W w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Figure 19-3. DSPI Module Configuration Register (DSPI x _MCR)
Table 19-3. DSPI x _MCR Field Descriptions
Field Description
0
MSTR
Master/slave mode select. Configures the DSPI for master mode or slave mode.
0 DSPI is in slave mode
1 DSPI is in master mode
1
CONT_SCKE
Continuous SCK enable. Enables the serial communication clock (SCK) to run continuously. Refer to
Section 19.4.8, “Continuous Serial Communications Clock ,” for details.
0 Continuous SCK disabled
1 Continuous SCK enabled
Table 19-2. DSPI Detailed Memory Map (continued)
Address Register Name Register Description Bits