Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
18-80
Freescale Semiconductor
After the start of command sequence transfer, the eQADC checks for the command sequence coherency
until the command sequence ends or one of the following conditions are true:
•
Command sequence is non-coherent.
•
CFIFO status changes from the TRIGGERED state
•
CFIFO underflow occurs
NOTE
The NCF flag is asserted if an external command buffer empty event is
detected at the same time the eQADC stops checking for the coherency of a
command sequence.
After command transfers restart or continue, the non-coherency hardware operate as if the command
sequence started from that point.
depicts how the non-coherency hardware operates when a
non-coherency event is detected.
NOTE
If MODE
n
is changed to disabled while a CFIFO is transferring commands,
the NCF flag for that CFIFO is not asserted.
NOTE
When the eQADC enters debug or stop mode while a command sequence is
executing, the NCF asserts if an empty external command buffer is detected
after debug or stop mode exits.
Table 18-46. External Buffer Status
Capture
Point at
eQADC
Buffer Status at
External Device
Buffer Status as
Captured by the
eQADC
Used for NCF
Detection on the
eQADC?
(a)
EMPTY
EMPTY
No change
(b)
1 ENTRY
EMPTY
No
(c)
2 ENTRY
1 ENTRY
Yes
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
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Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...