Freescale Semiconductor MPC5565, Reference Manual

Page: 943 / 1153

Preface
MPC5565 Microcontroller Reference Manual, Rev. 1.0
21-6 Freescale Semiconductor
The FlexCAN2 module stores CAN messages for transmission and reception using a message buffer
structure. Each individual MB is formed by 16 bytes of memory mapped as described in
Table 21-3 . The
FlexCAN2 module can manage up to 64 message buffers. Table 21-3 shows the standard and extended
message buffer (MB0) memory map, using 16 bytes (0x80
–
0x8F) total space.
NOTE
Reading the C/S word of a message buffer (the first word of each MB) will
lock it, preventing it from receiving further messages until it is unlocked
either by reading another MB or by reading the timer.
21.3.2 Message Buffer Structure
The message buffer structure used by the FlexCAN2 module is represented in Figure 21-2 . Both extended
and standard frames (29-bit identifier and 11-bit identifier, respectively) used in the CAN specification
(version 2.0 Part B) are represented.
Base + 0x001C CAN x _ECR Error counter register 32
Base + 0x0020 CAN x _ESR Error and status register 32
Base + 0x0024 CAN x _IMRH Interrupt masks high register 32
Base + 0x0028 CAN x _IMRL Interrupt masks low register 32
Base + 0x002C CAN x _IFRH Interrupt flags high register 32
Base + 0x0030 CAN x _IFRL Interrupt flags low register 32
Base + 0x0034–Base + 0x005F — Reserved —
Base + 0x0060–Base + 0x007F — Reserved —
Base + 0x0080–Base + 0x017F MB0 – MB15 Message buffers 0–15 128 bits per MB
Base + 0x0180–Base + 0x027F MB16–MB31 Message buffers 16–31 128 bits per MB
Base + 0x0280–Base + 0x047F MB32 – MB63 Message buffers 32–63 128 bits per MB
Base + 0x0880–Base + 0x08BF CANx_RXIMR0–CANx_RXIMR15 RX individual mask register 0–15 32
Base + 0x08C0– Base + 0x08FF CANx_RXIMR16–CANx_RXIMR31 RX individual mask register 16–31 32
Base + 0x0900– Base + 0x097F CANx_RXIMR32–CANx_RXIMR63 RX individual mask register 32–63 32
Table 21-3. Message Buffer MB0 Memory Mapping
Address
Offset
MB Field
0x80 Control and status (C/S)
0x84 Identifier field
0x88 – 0x8F Data fields 0 – 7 (1 byte each)
Table 21-2. Module Memory Map (continued)
Address Register Name Register Description Bits