System Integration Unit (SIU)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
6-122
Freescale Semiconductor
Section 6.3.1.44, “Pad Configuration Register 82–75 (SIU_PCR82–SIU_PCR75) Changed order of MDO[11:4]_GPIO[82:75]
to MDO[4:11_GPIO[75:82].
Table 6-41
PCR83 PA Field Definitions:
Removed TXDA from MPC5565 in the register description and the table entry.
Table 6-42
PCR84 PA Field Definitions:
Removed RXDA from MPC5565 in the register description and the table entry.
Table 6-92 Changed conditional text to show PCSA[5] in table and register description.
Section 6.4.2.1, “RESET Pin Glitch Detect” First paragraph: added ‘(SIU_RSR)’ after ‘reset status register’ in line four.
Section 6.4.4, “GPIO Operation Changed ‘GPDO
n_n’
and
‘
GPDI
n_n’
to ‘GPDO
n’
and ‘GPDI
n’.
Table 6-6 “
SIU_MIDR Field Descriptions
”: Removed the note in the CSP row “ Use CSP with PKG to implement calibration
functionality. Removed comments in PKG row (after CSP row) pertaining to CSP.
Figure 6-72
ETRIG[0:1]_GPIO[111:112] Pad Configuration Register (SIU_PCR112–SIU_PCR112)
: Removed “When
ETRIG[0:1] is configured, the OBE has no effect” from footnote 2.
Section 6.3.1.44, “Pad Configuration Register 82–75 (SIU_PCR82–SIU_PCR75) Changed order of MDO[4:11_GPIO[75:82]
to MDO[11:4]_GPIO[82:75].
Section 6.4.2.1, “RESET Pin Glitch Detect” Corrected incomplete sentence “The latch is cleared when the RGF bit is set in
the SIU_RSR or a valid reset is recognized.” Added ‘SIU_RSR.’
Section 6.2.1.6.2, “DMA Transfers” Rewrote paragraph to clarify that only 4 DMA transfer/IRQ requests are selectable (IRQ[0]
through IRQ[3]).
Table 6-41
PCR83 PA Field Definitions:
Added back in TXDA in the register description and the table entry.
Table 6-42
PCR84 PA Field Definitions:
Added back in RXDA in the register description and the table entry.
Table 6-26
PCR49 PA Field Definitions:
Corrected values for PCR entries.
Table 6-28
PCR51 PA Field Definitions:
Corrected the table title from PCR49 to PCR51 and the values for PCR entries.
Throughout this chapter, replaced ‘Reserved’ with ‘Invalid value’ for all R/W fields that have invalid values.
Table 6-140. Changes Between MPC5565RM Revisions 0.1 and 1 (continued)
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
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Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...