System Integration Unit (SIU)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
6-80
Freescale Semiconductor
6.3.1.102 Pad Configuration Register 198 (SIU_PCR198)
The SIU_PCR198 register controls the function, direction, and electrical attributes of the
EMIOS[19]_GPIO[198] pin. Both the input and output functions of EMIOS[19] are connected.
Figure 6-100. EMIOS[19]_GPIO[198] Pad Configuration Register (SIU_PCR198)
Refer to
lists the PA fields for EMIOS[19]_GPIO[198].
6.3.1.103 Pad Configuration Registers 199–200 (SIU_PCR199–SIU_PCR200)
The SIU_PCR199–SIU_PCR200 registers control the function, direction, and electrical attributes of
EMIOS[20:21]_GPIO[199:200]. Both the input and output functions of EMIOS[20:21] are connected.
Figure 6-101. EMIOS[20:21]_GPIO[199:200]
Pad Configuration Register (SIU_PCR199–SIU_PCR200)
Address: Base + 0x01C6 through Base + 0x01CC
Access: R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
1
1
The PA function using the 0b10 value is disabled on this device.
OBE
2
2
The OBE bit must be set to 1 for EMIOS[19] and GPIO[198] when configured as output.
IBE
3
3
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[19] or GPIO[198] when configured as input.
0
0
ODE
HYS
SRC
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
U
4
4
The weak pullup/down selection at reset for the EMIOS[19] pins is determined by the WKPCFG pin.
Table 6-95. PCR198 PA Field Definition
PA Field
Pin Function
0b00
GPIO[198]
0b01
EMIOS[19]
0b10
Invalid value
0b11
EMIOS[19]
Address: Base + 0x01CE
Access: R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
PA
1
1
The PA function using the 0b10 value is disabled on this device.
OBE
2
2
The OBE bit must be set to 1 for EMIOS[20:21] or GPIO[199:200] when configured as output.
IBE
3
3
When the pad is configured as an output, set the IBE bit to 1 to show the pin state in the GPDI register. Clear the IBE bit to 0
to reduce power consumption. The IBE bit must be set to 1 for EMIOS[20:21] or GPIO[199:200] when configured as input.
0
0
ODE
HYS
SRC
WPE
WPS
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
U
4
4
The weak pullup/down selection at reset for the EMIOS[20:21] pin is determined by the WKPCFG pin.
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
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Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...