Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Direct Memory Access (eDMA)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
9-16 Freescale Semiconductor
9.2.2.11 eDMA Set START Bit Register (EDMA_SSBR)
The EDMA_SSBR provides a simple memory-mapped mechanism to set the START bit in the TCD of the
given channel. The data value on a register write causes the START bit in the corresponding transfer
control descriptor to be set. Setting bit 1 (SSB
n ) provides a global set function, forcing all START bits to
be set. Reads of this register return all zeroes.
Table 9-11. EDMA_CER Field Descriptions
Field Description
0 Reserved.
1–7
CERR[0:6]
Clear error indicator.
0–31 Clear corresponding bit in EDMA_ERL
32–63 Reserved
64–127 Clear all bits in EDMA_ERH or EDMA_ERL
Note: Bit 2 (CERR1) is not used.
Address: Base + 0x001E Access:User W/O
0 1 2 3 4 5 6 7
R 0 0 0 0 0 0 0 0
W SSB[0:6]
Reset 0 0 0 0 0 0 0 0
Figure 9-12. eDMA Set START Bit Register (EDMA_SSBR)
Table 9-12. EDMA_SSBR Field Descriptions
Field Description
0 Reserved.
1–7
SSB[0:6]
Set START bit (channel service request).
0–31 Set the corresponding channel’s TCD START bit
32–63 Reserved
64–127 Set all TCD START bits
Note: Bit 2 (SSB1) is not used.