Freescale Semiconductor MPC5565, Reference Manual

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System Integration Unit (SIU)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 6-11
6.3.1.2 Reset Status Register (SIU_RSR)
The SIU_RSR contains the source(s) of the most recent reset, and the state of the configuration pins at
reset. Except for a POR request or a software external reset, all reset requests, regardless of priority, are
not serviced until the current reset completes.
This register contains one reset status bit for each of the following reset sources:
• Power-on reset (POR)
• External reset
• Software system reset
• Software external reset
• Watchdog reset
• Loss-of-lock reset
• Loss-of-clock reset
• Checkstop reset
A reset status bit set to logic 1 indicates a reset request by that source. After they are set, reset status bits
remain set until another reset occurs. Simultaneous reset requests are prioritized. When reset requests of
different priorities occur on the same clock cycle, the reset request with the highest priority is serviced and
only that reset request's status bit is set.
Table 6-6. SIU_MIDR Field Descriptions
Field Description
0–15
PARTNUM
MCU part number. Read-only, mask programmed part identification number of the MCU.
MPC5565 reads 0x5565.
16
CSP
CSP configuration:
0 Standard package
1 CSP package
17–19
PKG
Package settings. PKG selects the pin package for the MPC5565 device.
000
Select for Legacy compatibility
001–01 x Reserved
100 Reserved
101
Selects the 324 package
110 Select the 496 calibration assembly
111 Reserved
20–23 Reserved
24–27
MASKNUM_MAJOR
[0:3]
Major revision number of MCU mask. Read-only, mask programmed mask number of the
MCU. Reads 0x0 for the initial mask set of the device, and changes sequentially for each
mask set.
28–31
MASKNUM_MINOR
[0:3]
Minor revision number of MCU mask. Read-only, mask programmed mask number of the
MCU. Reads 0x0 for the initial mask set of the device, and changes sequentially for each
mask set.