MPC5565 Reference Manual Addendum, Rev. 2
Addendum for Revision 1.0
Freescale Semiconductor
8
Table 16-9/ Page 16-15
Bit 7—DMA: Replace the table that shows the eMIOS channels that don’t support DMA with the
following table.
Section 9.3.1, “eDMA
Microarchitecture”/ Page
9-29
In the Memory controller sub-bullet, delete the line "The hooks to a BIST controller for the local
TCD memory are included in this module".
Table 1. MPC5565RM Rev 1.0 addendum (continued)
Location
Description
eMIOS Channel
DMA = 0
DMA = 1
0
Interrupt
DMA request
1
Interrupt
DMA request
2
Interrupt
DMA request
3
Interrupt
DMA request
4
Interrupt
DMA request
5
Interrupt
Reserved
6
Interrupt
Reserved
7
Interrupt
Reserved
8
Interrupt
DMA request
9
Interrupt
DMA request
10
Interrupt
Reserved
11
Interrupt
Reserved
12
Interrupt
Reserved
13
Interrupt
Reserved
14
Interrupt
Reserved
15
Interrupt
Reserved
16
Interrupt
Reserved
17
Interrupt
Reserved
18
Interrupt
Reserved
19
Interrupt
Reserved
20
Interrupt
Reserved
21
Interrupt
Reserved
22
Interrupt
Reserved
23
Interrupt
Reserved
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
Page 35: ...MPC5565 Reference Manual Rev 1 0 16 Freescale Semiconductor...
Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...