Freescale Semiconductor MPC5565, Reference Manual

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Nexus
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 24-67
24.11.15.1 Single Write Access
1. Initialize the read/write access address register (RWA) through the access method outlined in
Section 24.11.10, “ NZ6C3 Register Access via JTAG / OnCE ” using the Nexus register index
of 0x9 (refer to Table 24-24 ). Configure as follows:
– Write Address -> 0xnnnnnnnn (write address)
2. Initialize the read/write access control/status register (RWCS) through the access method outlined
in Section 24.11.10, “ NZ6C3 Register Access via JTAG / OnCE ,” using the Nexus Register Index
of 0x7 (refer to Table 24-24 ). Configure the bits as follows:
– Access Control RWCS[AC] –> 0b1 (to indicate start access)
– Map Select RWCS[MAP] –> 0b000 (primary memory map)
– Access Priority RWCS[PR] –> 0b00 (lowest priority)
– Read/Write RWCS[RW] –> 0b1 (write access)
– Word Size RWCS[SZ] –> 0b0xx (32-bit, 16-bit, 8-bit)
– Access Count RWCS[CNT] –> 0x0000 or 0x0001 (single access)
NOTE
Access count RWCS[CNT] of 0x0000 or 0x0001 will perform a single
access.
3. Initialize the read/write access data register (RWD) through the access method outlined in
Section 24.11.10, “ NZ6C3 Register Access via JTAG / OnCE ,” using the Nexus register index of
0xA (refer to Table 24-24 ). Configure as follows:
– Write Data -> 0xnnnnnnnn (write data)
4. The NZ6C3 module will then arbitrate for the system bus and transfer the data value from the data
buffer RWD register to the memory mapped address in the read/write access address register
(RWA). When the access has completed without error (ERR=1’b0), NZ6C3 asserts the RDY
pin
and clears the DV bit in the RWCS register. This indicates that the device is ready for the next
access.
NOTE
Only the RDY pin as well as the DV and ERR bits within the RWCS provide
read/write access status to the external development tool.
24.11.15.2 Block Write Access (Non-Burst Mode)
1. For a non-burst block write access, follow Steps 1, 2, and 3 outlined in Section 24.11.15.1, “Single
Write Access to initialize the registers,” but using a value greater than one (0x1) for the
RWCS[CNT] field.
2. The NZ6C3 module will then arbitrate for the system bus and transfer the first data value from the
RWD register to the memory mapped address in the read/write access address register (RWA).
When the transfer has completed without error (ERR = 0), the address from the RWA register is
incremented to the next word size (specified in the SZ field) and the number from the CNT field is
decremented. Nexus will then assert the RDY pin. This indicates that the device is ready for the
next access.