Interrupt Controller (INTC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
10-13
Although INTC_SSCI
n
is 8 bits wide, it can be accessed with a single 16-bit or 32-bit access, provided
that the access does not cross a 32-bit boundary.
10.3.1.6
INTC Priority Select Registers (INTC_PSR0–231)
The INTC_PSR
n
support the selection of an individual priority for each source of interrupt request. The
unique vector of each peripheral or software settable interrupt request determines which INTC_PSR
n
is
assigned to that interrupt request. The software settable interrupt requests 0–7 are assigned vectors 0–7,
and their priorities are configured in INTC_PSR0–INTC_PSR7, respectively. The peripheral interrupt
requests are assigned vectors 8–231 and their priorities are configured in INTC_PSR8 through
INTC_PSR231, respectively.
Although INTC_PSR
n
is 8 bits wide, it can be accessed with a single 16-bit or 32-bit access, provided that
the access does not cross a 32-bit boundary.
NOTE
The PRI
n
field of an INTC_PSR
n
must not be modified while its
corresponding peripheral or software settable interrupt request is asserted.
Address: Base +
n
(INTC_SSCIR
n
);
n
= 0–7
Access: R/W
0
1
2
3
4
5
6
7
R
0
0
0
0
0
0
0
CLR
n
W
SET
n
Reset
0
0
0
0
0
0
0
0
Figure 10-12. INTC Software Set/Clear Interrupt Register (INTC_SSCIR
n
)
Table 10-7. INTC_SSCIR
n
Field Descriptions
Field
Description
0–5
Reserved, must be cleared.
6
SET
n
Set flag bits. Writing a 1 sets the corresponding CLR
n
bit. Writing a 0 has no effect. Each SET
n
is always read as a 0.
7
CLR
n
Clear flag bits. CLR
n
is the flag bit. Writing a 1 to CLR
n
clears it provided that a 1 is not written simultaneously to its
corresponding SET
n
bit. Writing a 0 to CLR
n
has no effect.
0 Interrupt request not pending within INTC.
1 Interrupt request pending within INTC.
Address: Base +
n
(INTC_PSR
n
);
n
= 0–231
Access: R/W
0
1
2
3
4
5
6
7
R
0
0
0
0
PRI
n
W
Reset
0
0
0
0
0
0
0
0
Figure 10-13. INTC Priority Select Registers (INTC_PSR
n
)
Summary of Contents for MPC5565
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