Freescale Semiconductor MPC5565, Reference Manual

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MPC5565 Register Map
MPC5565 Microcontroller Reference Manual, Rev. 1.0
A-30 Freescale Semiconductor
eTPU A channel 23 host service request register ETPU_C23HSRR_A 32-bit Base + 0x0578
Reserved — — Base + (0x057C–0x057F)
eTPU A channel 24 configuration register ETPU_C24CR_A 32-bit Base + 0x0580
eTPU A channel 24 status and control register ETPU_C24SCR_A 32-bit Base + 0x0584
eTPU A channel 24 host service request register ETPU_C24HSRR_A 32-bit Base + 0x0588
Reserved — — Base + (0x058C–0x058F)
eTPU A channel 25 configuration register ETPU_C25CR_A 32-bit Base + 0x0590
eTPU A channel 25 status and control register ETPU_C25SCR_A 32-bit Base + 0x0594
eTPU A channel 25 host service request register ETPU_C25HSRR_A 32-bit Base + 0x0598
Reserved — — Base + (0x059C–0x059F)
eTPU A channel 26 configuration register ETPU_C26CR_A 32-bit Base + 0x05A0
eTPU A channel 26 status and control register ETPU_C26SCR_A 32-bit Base + 0x05A4
eTPU A channel 26 host service request register ETPU_C26HSRR_A 32-bit Base + 0x05A8
Reserved — — Base + (0x05AC–0x05AF)
eTPU A channel 27 configuration register ETPU_C27CR_A 32-bit Base + 0x05B0
eTPU A channel 27 status and control register ETPU_C27SCR_A 32-bit Base + 0x05B4
eTPU A channel 27 host service request register ETPU_C27HSRR_A 32-bit Base + 0x05B8
Reserved — — Base + (0x05BC–0x05BF)
eTPU A channel 28 configuration register ETPU_C28CR_A 32-bit Base + 0x05C0
eTPU A channel 28 status and control register ETPU_C28SCR_A 32-bit Base + 0x05C4
eTPU A channel 28 host service request register ETPU_C28HSRR_A 32-bit Base + 0x05C8
Reserved — — Base + (0x05CC–0x05CF)
eTPU A channel 29 configuration register ETPU_C29CR_A 32-bit Base + 0x05D0
eTPU A channel 29 status and control register ETPU_C29SCR_A 32-bit Base + 0x05D4
eTPU A channel 29 host service request register ETPU_C29HSRR_A 32-bit Base + 0x05D8
Reserved — — Base + (0x05DC–0x05DF)
eTPU A channel 30 configuration register ETPU_C30CR_A 32-bit Base + 0x05E0
eTPU A channel 30 status and control register ETPU_C30SCR_A 32-bit Base + 0x05E4
eTPU A channel 30 host service request register ETPU_C30HSRR_A 32-bit Base + 0x05E8
Reserved — — Base + (0x05EC–0x05EF)
eTPU A channel 31 configuration register ETPU_C31CR_A 32-bit Base + 0x05F0
eTPU A channel 31 status and control register ETPU_C31SCR_A 32-bit Base + 0x05F4
Table A-2. MPC5565 Detailed Register Map (continued)
Register Description Register Name
Used
Size
Address