Enhanced Direct Memory Access (eDMA)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
9-9
switching to the next read sequence, the read sequence executes before the channel is terminated due to
the destination bus error.
The occurrence of any type of error causes the eDMA engine to stop the active channel, and the appropriate
channel bit in the eDMA error register to be asserted. At the same time, the details of the error condition
are loaded into the EDMA_ESR. The major loop complete indicators, setting the transfer control
descriptor DONE flag and the possible assertion of an interrupt request, are
not
affected when an error is
detected. After the error status has been updated, the eDMA engine continues to operate by servicing the
next appropriate channel. A channel that experiences an error condition is not automatically disabled. If a
channel is terminated by an error and then issues another service request before the error is fixed, that
channel executes and terminates with the same error condition.
Address: Base + 0x0004
Access: User R/O
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R VLD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R GPE
CPE
ERRCHN
SAE
SOE
DAE
DOE
NCE
SGE
SBE
DBE
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 9-3. eDMA Error Status Register (EDMA_ESR)
Table 9-3. EDMA_ESR Field Descriptions
Field
Description
0
VLD
Logical OR of all EDMA_ERH and EDMA_ERL status bits.
0 No EDMA_ER bits are set.
1 At least one EDMA_ER bit is set indicating a valid error exists that has not been cleared.
1–15
Reserved.
16
GPE
Group priority error.
0 No group priority error.
1 The last recorded error was a configuration error among the group priorities indicating not all group
priorities are unique.
17
CPE
Channel priority error.
0 No channel priority error.
1 The last recorded error was a configuration error in the channel priorities within a group, indicating not
all channel priorities within a group are unique.
18–23
ERRCHN[0:5]
Error channel number. Channel number of the last recorded error (excluding GPE and CPE errors).
Note:
Do not rely on the number in the ERRCHN field for group and channel priority errors. Group and
channel priority errors need to be resolved by inspection. The application code must interrogate the
priority registers to find groups or channels with duplicate priority level.
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
Page 35: ...MPC5565 Reference Manual Rev 1 0 16 Freescale Semiconductor...
Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...