External Bus Interface (EBI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
12-67
12.5.6
Summary of Differences from MPC5xx
The follosing summary lists the significant differences between this EBI used in the MPC5xxx and that of
the MPC5xx parts:
•
SETA feature is no longer available: chip select devices cannot use external TA, instead must use
wait state configuration.
•
No memory controller support for external masters: must configure each master in multi-master
system to drive its own chip selects
•
Changes in bit fields:
— Removed these variable timing attributes from option register: CSNT, ACS, TRLX, EHTR
— Removed LBDIP base register bit, now late BDIP assertion is default behavior
— Modified TSIZ[0:1] functionality to only indicate size of current transfer, not give information
on ensuing transfers that may be part of the same atomic sequence
— The BL field of the base register has inverted logic from the MPC56x devices (0 = eight-beat
burst on the MPC5xxx, 1 = eight-beat burst on the MPC56x)
•
Removed reservation support on external bus
•
Removed address type (AT), write-protect (WP), and dual-mapping features because these
functions can be replicated by memory management unit (MMU) in e200z6 core
•
Removed support for 8-bit ports
•
Removed boot chip select operation: on-chip boot assist module (BAM) handles boot (and
configuration of EBI registers)
•
Open drain mode and pullup resistors no longer required for multi-master systems, extra cycle
needed to switch between masters
•
Modified arbitration protocol to require extra cycles when switching between masters
•
Added support for 32-bit coherent read and write non-chip select accesses in 16-bit data bus mode
•
Misaligned accesses are not supported
•
Calibration features implemented by three calibration chip selects
•
Removed support for 3-master systems
•
Address decoding for external master accesses uses 4-bit code to determine internal slave instead
of straight address decode
Summary of Contents for MPC5565
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Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
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Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...
