Reset
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
4-11
4.4.2.3.8
Software System Reset
A software system reset is caused by a write to the SSR bit in the system reset control register
(SIU_SRCR). A write of 1 to the SSR bit causes an internal reset of the MCU. The internal reset signal is
asserted (as indicated by assertion of RSTOUT). The value on the WKPCFG pin is applied starting at the
assertion of the internal reset signal (as indicated by assertion of RSTOUT); at the same time the
PLLCFG[0:1] values are applied if RSTCFG is asserted. After the FMPLL locks, the reset controller waits
a predetermined number of clock cycles before negating RSTOUT. When the clock count finishes the
WKPCFG and BOOTCFG[0:1] pins are sampled (the BOOTCFG[0:1] pins are only sampled if RSTCFG
is asserted). The reset controller then waits 4 clock cycles before negating RSTOUT, and the associated
bits/fields are updated in the SIU_RSR. In addition, the SSRS bit is set, and all other reset status bits in the
SIU_RSR are cleared.
Refer to
Section 4.2.2, “Reset Output (RSTOUT)
4.4.2.3.9
Software External Reset
A write of 1 to the SER bit in the SIU_SRCR causes the external RSTOUT pin to be asserted for a
predetermined number of clocks. The SER bit automatically clears after the clock cycle expires. A
software external reset does not cause a reset of the MCU, the BAM program is not executed, the
PLLCFG[0:1], BOOTCFG[0:1], and WKPCFG pins are not sampled. The SERF bit in the SIU_RSR is
set, but no other status bits are affected. The SERF bit in the SIU_RSR is not automatically cleared after
the clock count expires, and remains set until cleared by software or another reset besides the software
external reset occurs.
Refer to
Section 4.2.2, “Reset Output (RSTOUT)
For a software external reset, the e200z6 core continues to execute instructions, timers that are enabled
continue to operate, and interrupt requests continue to process. The application must ensure devices
connected to RSTOUT are not accessed during a software external reset, and determine how to manage
MCU resources.
4.4.3
Reset Configuration and Configuration Pins
The microcontroller and the BAM perform a reset configuration that allows certain functions of the MCU
to be controlled and configured at reset. This reset configuration is defined by:
•
Configuration pins
•
A reset configuration halfword (RCHW), if present
•
Serial port, if a serial boot is used
The following sections describe these configuration pins and the RCHW.
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
Page 35: ...MPC5565 Reference Manual Rev 1 0 16 Freescale Semiconductor...
Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...