Freescale Semiconductor MPC5565, Reference Manual

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External Bus Interface (EBI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 12-69
Added text to clarify the differences in the 324 package limitations and the device design:
• Section 12.1.1, “Block Diagram” Added the following sentence to the first note in this section:
The last two columns in for a list of available signals on the 324 package and the VertiCal assembly. The VertiCal assembly
has ball connections for all the available signals on the device.
Added the following introductory sentence for a new table Table 12-1. The 324 package has a limited number of balls which
affects the following EBI and calibration signals: Added Table 12-1.
• Figure 12-1 MPC5565 EBI Connections : Added the following footnotes:
1
Although the MPC5565 is designed to support a 32-bit EBI, not all pins are available on the 324 package. Refer to
Table 12-1 for a description of the differences between the device design and package pinouts.
2
The MPC5565 calibration bus and calibration signals are only available on the VertiCal assembly.
• Table 12-2 Address Bus Sizes in the MPC5565 : Changed footnote 3 to read:
3
The calibration feature is only available using the VertiCal assembly. The default calibration address bus is 19 bits muxed
with CAL_ADDR[12:30]. However, it can be configured to use CAL_ADDR[10:11] of the muxed signals
CAL_CS[2:3]_CAL_ADDR[10:11] to increase the calibration bus size to the maximum allowable width on this device of
21 bits.
• Table 12-3 Data Bus Sizes in the MPC5565 : Added footnotes 1 and 2:
1
Although the device is designed to support a 32-bit EBI data bus, the 324 package only supplies 16 balls for the EBI data
bus (DATA[0:15]).
2
The calibration feature is only available using the VertiCal assembly. Although the device is designed to support
calibration, the 324 package does not provide balls for this feature.
• Section 12.1.4.2, “External Master Mode Changed the conditional text settings.
• Table 12-4
Signal Properties: Added and or changed the following footnotes:
2
The 324 package does not support all the muxed signals in the device design. Refer to Table 12-1 for a description of
the differences between the device design and the 324 package limitations.
3
All EBI and calibration signals designed for this device are available on the VertiCal assembly.
5
ADDR[8:11] signals are muxed as alternate signals with the chip select CS[0:3] and GPIO[0:3] signals. ADDR[8:11] are
also available as primary signals in the device design muxed with GPIO[4:7], however ADDR[8:11]_GPIO[4:7] are not
available in 324 package. Refer to Table 12-1 for more information.
6
The 324 package does not have balls for the calibration bus signals; only the VertiCal assembly currently supports the
calibration bus for this device.
• Section 12.2.1, “Detailed Signal Descriptions”: Added the following sentence: Refer to Table 12-1for a description of the
differences between the device design and the 324 package limitations.
• Section 12.2, “External Signal Description”: Moved the following text from this section to Section 12.2.1.15, “Calibration
Signals”:
DATA is not driven by the EBI during a calibration bus access. During a calibration bus access, the non-calibration bus
signals (other than DATA) are held in a negated state, with the exception of RD_WR and ADDR, which reflect the same
values shown on the calibration version of those signals. Because the TS and CS signals are held negated on the EBI
(non-calibration bus) during calibration accesses, no transfer occurs on the EBI.
During a EBI bus access, the calibration bus signals (other than CAL_DATA) are held in a negated state. CAL_DATA is not
driven during non-calibration accesses.
• Attempted to reconcile the conditional text in Section 12.2.1, “Detailed Signal Descriptions” and all its subsections.
• Table 12-5
Signal Function ( f ) According to EBI Mode Settings : Added the following footnotes:
1
These signals are muxed with the chip select (CS) signals on this device. Use the pad configuration registers (PCR) in
the system integration module (SIU) to configure the balls to use the address signals or chip select signals–not both.
4
This device is designed to support a 32-bit EBI data bus (DATA[0:31]) and four write/byte enable signals (WE/BE[0:3])
on the VertiCal assembly. The 324 package provides a 16-bit EBI data bus (DATA[0:16]) and two write/byte enable
signals (WE/BE[0:1]) only.
5
Although the device design supports the TEA signal, it is not available on the 324 package. The TEA signal is available
for this device on the VertiCal assembly only.
6
The calibration signals for this device are available on the VertiCal assembly only.
Table 22. Changes Between MPC5565RM Revisions 0.1 and 1 (continued)