Freescale Semiconductor MPC5565, Reference Manual

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Introduction
MPC5565 Microcontroller Reference Manual, Rev. 1.0
1-2 Freescale Semiconductor
Figure 1-1 is a block diagram of the MPC5565.
.
Figure 1-1. MPC5565 Block Diagram
Integer
execution
unit
Multiply
unit
LSU
BPU PCU
Instruction
unit
Core registers
e200z6e core
Nexus
SPE
APU
GPRs (64-bits)
SPRs
JTAG
Exception
handler
Timer unit
(TB, DEC,
FIT, WDT)
VLE
MMU
Unified
8-KB
cache
eTPU
XBAR
control
EBI
control
FBIU
eDMA
control
Interrupt controller
SIU eMIOS
DSPI
eSCI
FlexCAN eQADC
FMPLL
EBI
Flash
eDMA
S
ystem
b
u
s crossb
ar
switch
(XBAR)
Peripheral bridge B (PBRIDGE_B) Peripheral bridge A (PBRIDGE_A)
Master
Master Slave
BAM
NDI
x3
x2
x3 x2
1 engine
Legend
e200z6e core components
APU – Auxiliary processing unit
BIU – Bus interface unit
BPU – Branch processing unit
DEC – Decrementer
FIT – Fixed interval timer
GPR – General-purpose register
JTAG – JTAG controller
LSU – Load/store unit
MMU – Memory management unit
PCU – Program counter unit
SPE – Signal processing engine
SPR – Special purpose register
TB – Time base
VLE – Variable length encoding
WDT – Watchdog timer
Slave
MPC5565 device modules
BAM – Boot assist module
CAN – Controller area network (FlexCAN)
DSPI – Deserial/serial peripheral interface
EBI – External bus interface
ECSM – Error correction status module
eDMA – Enhanced direct memory access
eMIOS – Enhanced modular I/O system
eQADC – Enhanced queued analog/digital converter
eSCI – Enhanced serial communications interface
eTPU – Enhanced time processing unit
FBIU – Flash bus interface unit
FMPLL – Frequency modulated phase-locked loop
INTC – Interrupt controller
NDI – Nexus developmental interface
SIU – System integration unit
SRAM – Internal static RAM
VRC – Voltage regulator controller
XBAR – System bus crossbar switch
2 MB
32 ch
Internal
SRAM
VRC
– System bus
Master
Slave
Slave
Slave
Slave
ECSM
80 KB