Freescale Semiconductor MPC5565, Reference Manual

Page: 717 / 1153

Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
18-18 Freescale Semiconductor
18.3.2.5 eQADC Result FIFO Pop Registers 0–5 (EQADC_RFPR n )
The eQADC_RFPRs provide a mechanism to retrieve data from RFIFOs.
NOTE
The EQADC_RFPR n must not be read speculatively. For future
compatibility, the TLB entry covering the EQADC_RFPR n must be
configured to be guarded.
18.3.2.6 eQADC CFIFO Control Registers 0–5 (EQADC_CFCR n )
The eQADC_CFCRs contain bits that affect CFIFOs. These bits specify the CFIFO operation mode and
can invalidate all of the CFIFO contents.
Address: Base + 0x030 (EQADC_RFPR0)
Base + 0x034
(
EQADC_RFPR1)
Base + 0x038 (EQADC_RFPR2)
Base + 0x03C (EQADC_RFPR3)
Base + 0x040 (EQADC_RFPR4)
Base + 0x044 (EQADC_RFPR5)
Access: Read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R RF_POP n
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 18-6. eQADC RFIFO Pop Registers 0–5 (EQADC_RFPR n )
Table 18-8. EQADC_RFPR n Field Descriptions
Field Description
0–15 Reserved.
16–31
RF_POP n
[0:15]
Result FIFO pop data n . When RFIFO n is not empty, the RF_POP n contains the next unread entry value of RFIFO n.
Reading the whole word, a halfword, or any bytes of EQADC_RFPR n pops one entry from RFIFO n , and the
RFCTR n value is decremented by 1. Refer to Section 18.3.2.8, “eQADC FIFO and Interrupt Status Registers 0–5
(EQADC_FISRn) .” When the RFIFO n is empty, any read on EQADC_RFPR n returns undefined data value and
does not decrement the RFCTR n value. Writing to EQADC_RFPR n has no effect.