Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 18-115
18.5.3 Sending Immediate Command Setup Example
In the eQADC, there is no immediate command register for sending a command immediately after writing
to that register. However, a CFIFO can be configured to perform the same function as an immediate
command register. The following steps illustrate how to configure CFIFO5 as an immediate command
CFIFO. This eliminates the use of the eDMA. The results are returned to RFIFO5.
1. Configure the Section 18.3.2.7, “eQADC Interrupt and eDMA Control Registers 0–5
(EQADC_IDCRn) .”
a) Clear CFIFO fill enable5 (CFFE5 = 0) in EQADC_IDCR5.
b) Clear CFIFO underflow interrupt enable5 (CFUIE5 = 0) in EQADC_IDCR2.
c) Clear RFDS5 to configure the eQADC to generate interrupt requests to pop result data from
RFIF05.
d) Set RFIFO drain enable5 (RFDE5 = 1) in EQADC_IDCR5.
2. Configure the Section 18.3.2.6, “eQADC CFIFO Control Registers 0–5 (EQADC_CFCRn) .”
a) Write 1 to CFINV5 in EQADC_CFCR5. This invalidates the contents of CFIFO5.
a) Set MODE5 to continuous-scan software trigger mode in EQADC_CFCR5.
3. To transfer a command, write it to the eQADC CFIFO push register 5 (EQADC_CFPR5) with
message tag = 0b0101. Refer to Section 18.3.2.4, “eQADC CFIFO Push Registers 0–5
(EQADC_CFPRn) .”
4. Up to 4 commands can be queued in CFIFO5. Check the CFCTR5 status in EQADC_FISR5 before
pushing another command to avoid overflowing the CFIFO. Refer to Section 18.3.2.8, “eQADC
FIFO and Interrupt Status Registers 0–5 (EQADC_FISRn) .”
5. When the eQADC receives a conversion result for RFIFO5, it generates an interrupt request.
RFIFO pop register 5 (EQADC_RFPR5) can be popped to read the result. Refer to
Section 18.3.2.5, “eQADC Result FIFO Pop Registers 0–5 (EQADC_RFPRn) .”
18.5.4 Modifying Queues
More command queues may be needed than the six supported by the eQADC. These additional command
queues can be supported by interrupting command transfers from a configured CFIFO, even if it is
triggered and transferring, modifying the corresponding command queue in the RAM or associating
another command queue to it, and restarting the CFIFO. More details on disabling a CFIFO are described
in
Section 18.4.3.5.1, “Disabled Mode .”
1. Determine the resumption conditions when later resuming the scan of the command queue at the
point before it was modified.
a) Change EQADC_CFCRn[MODE n ] (see Section 18.3.2.6, “eQADC CFIFO Control Registers
0–5 (EQADC_CFCRn) ”) to disabled. Refer to Section 18.4.3.5.1, “Disabled Mode ,” for a
description of what happens when MODE n is changed to disabled.
b) Poll EQADC_CFSR[CFS n ] until it becomes IDLE (see Section 18.3.2.11, “eQADC CFIFO
Status Register (EQADC_CFSR) ”).