External Bus Interface (EBI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
12-15
The following table describes the fields in the EBI module configuration register:
Table 12-7. EBI_MCR Field Descriptions
Field
Description
0–4
Reserved.
5
SIZEN
SIZE enable. The SIZEN bit enables the control of transfer size by the SIZE field for external master transactions to
internal addresses.
0 Invalid value
1 Transfer size controlled by SIZE field
Note: You must change this value from its reset value since the device does not have TSIZ pins.
Refer to
Section 12.5.5.3, “Transfer Size with No TSIZ Pins (Master/Master or Master/Slave)
.”
6–7
SIZE
Transfer size. The SIZE field determines the transfer size of external master transactions to internal address space
when SIZEN = 1. This field is ignored when SIZEN = 0. SIZE encoding:
00 32-bit
01 Byte
10 16-bit
11 Invalid value
Note: You must change this value from its reset value since the device does not have TSIZ pins.
Refer to
Section 12.5.5.3, “Transfer Size with No TSIZ Pins (Master/Master or Master/Slave)
.”
8–15
Reserved.
16
ACGE
Automatic CLKOUT gating enable. Enables the EBI feature of turning off CLKOUT (holding it high) during idle periods
in-between external bus accesses.
0 Automatic CLKOUT gating is disabled
1 Automatic CLKOUT gating is enabled
17
EXTM
External master mode. The EBI module must be enabled (MDIS = 0) to configure the external master mode. When
the EBI module is disabled (MDIS = 1), the value of the EXTM bit is ignored and read as 0.
External master mode (EXTM = 1) allows the external master device to access any internal memory area that is
mapped, as long as the internal e200z6 core is fully operational.
Single master mode (EXTM = 0) only allows internal masters can access internal memory.
0 Single master mode (external master mode disabled)
1 External master mode
Note: In the MPC5565, only master/slave systems support the EXTM functionality. Refer to
“Dual-MCU Operation with Reduced Pinout MCUs
.“
18
EARB
External arbitration. Refer to
Section 12.4.2.8, “Arbitration
”. When EXTM = 0, the EARB bit is a don’t care, and is
treated as 0.
0 Internal arbitration
1 External arbitration
19–24
Reserved.
25
MDIS
Module disable mode. Allows the clock to be stopped to the non-memory mapped logic in the EBI, effectively putting
the EBI in a software controlled power-saving state. Refer to
Section 12.1.4.3, “Module Disable Mode
,” for more
information. No external bus accesses can be performed when the EBI is in module disable mode (MDIS = 1).
0 Module disable mode inactive
1 Module disable mode active
26–30
Reserved.
31
DBM
Data bus mode. Controls whether the EBI is in 32-bit or 16-bit data bus mode.
0 32-bit data bus mode
1 16-bit data bus mode
Summary of Contents for MPC5565
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