Preface
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
21-19
•
If the RXECTR increases to a value greater than 127, it is not incremented further, even if more
errors are detected while being a receiver. At the next successful message reception, the counter is
set to a value between 119 and 127 to resume to ‘error active’ state.
21.3.3.7
Error and Status Register (CAN
x
_ESR)
CAN
x
_ESR reflects various error conditions, some general status of the device, and it is the source of two
interrupts to the CPU. The reported error conditions (bits 16–21) are those that occurred since the last time
the CPU read this register. The CPU read action clears BIT1ERR, BIT0ERR, ACKERR, CRCERR,
FRMERR, and STFERR. TXWRN, RXWRN, IDLE, TXRX, FLTCONF, BOFFINT, and ERRINT are
status bits.
Most bits in this register are read-only, except BOFFINT, ERRINT, TWRNINT, and RWRNINT which are
interrupt flags that can be cleared by writing 1 to them (writing 0 has no effect).
Refer to
,” for more details.
NOTE
A read clears BIT1ERR, BIT0ERR, ACKERR, CRCERR, FRMERR, and
STFERR, therefore these bits must not be read speculatively. For future
compatibility, the TLB entry covering the CAN
x
_ESR must be configured
to be guarded.
Address: Base + 0x001C
Access: User R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RXECTR
TXECTR
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 21-8. Error Counter Register (CAN
x
_ECR)
Address: Base + 0x0020
Access: User R/W
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TWRN
INT
RWRN
INT
W
w1c
w1c
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R BIT1
ERR
BIT0
ERR
ACK
ERR
CRC
ERR
FRM
ERR
STF
ERR
TX
WRN
RX
WRN
IDLE TXRX
FLTCONF
0
BOFF
INT
ERR
INT
0
W
w1c
w1c
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 21-9. Error and Status Register (CAN
x
_ESR)
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
Page 35: ...MPC5565 Reference Manual Rev 1 0 16 Freescale Semiconductor...
Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...
