Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 18-45
and three types of results can be expected: data read from an ADC register, a conversion result, or a time
stamp. The order at which ADC commands sent to the external device are executed, and the type of results
that can be expected depends on the architecture of that device with the exception of unsolicited data like
null messages for example.
NOTE
While the eQADC pops commands out from a CFIFO, it also is checking
the number of entries in the CFIFO and generating requests to fill it. The
process of pushing and popping commands to and from a CFIFO can occur
simultaneously.
The FIFO control unit expects all incoming results to be shaped in a pre-defined result message format.
Figure 18-25 shows how result data flows inside the eQADC system. Results generated on the on-chip
ADCs are formatted into result messages inside the result format and calibration submodule. Results
returning from the external device are already formatted into result messages and therefore bypass the
result format and calibration submodule located inside the eQADC. A result message is composed of an
RFIFO header and an ADC Result. The FIFO control unit decodes the information contained in the RFIFO
header to determine the RFIFO to which the ADC result should be sent. After in an RFIFO, the ADC result
is moved to the corresponding user result queue by the host CPU or by the eDMA as they respond to
interrupt and eDMA requests generated by the eQADC. The eQADC generates these requests whenever
an RFIFO has at least one entry.
NOTE
While conversion results are returned, the eQADC is checking the number
of entries in the RFIFO and generating requests to empty it. The process of
pushing and popping ADC results to and from an RFIFO can occur
simultaneously.