Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Direct Memory Access (eDMA)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 9-21
The following table describes the fields in the eDMA channel n priority register:
9.2.2.16 Transfer Control Descriptor (TCD)
Each channel requires a 256-bit transfer control descriptor for defining the desired data movement
operation. The channel descriptors are stored in the local memory in sequential order: channel 0,
channel 1,... channel 31. The definitions of the TCD are presented as 23 variable-length fields.
Table 9-18 defines the fields of the basic TCD structure.
Table 9-17. EDMA_CPR n Field Descriptions
Field Description
0
ECP
Enable channel preemption.
0 Channel
n cannot be suspended by a higher priority channel’s service request.
1 Channel n can be temporarily suspended by the service request of a higher priority channel.
1 Reserved.
2–3
GRPPRI[0:1]
Channel n current group priority. Group priority assigned to this channel group when fixed-priority
arbitration is enabled. These two bits are read only; writes are ignored. The reset value for the group
priority fields, is equal to the corresponding channel number for each priority register; that is,
EDMA_CPR31[GRPPRI] = 0b01.
4–7
CHPRI[0:3]
Channel n arbitration priority. Channel priority when fixed-priority arbitration is enabled. The reset value
for the channel priority fields CHPRI[0–3], is equal to the corresponding channel number for each priority
register; that is, EDMA_CPR31[CHPRI] = 0b1111.
Table 9-18. TCD n 32-bit Memory Structure
eDMA Bit Offset
Bit
Length
TCD n Field Name TCD n Abbreviation Word #
(32 x n) + 0 32 Source address SADDR Word 0
(32 x n) + 32 5 Source address modulo SMOD
Word 1
(32 x n) + 37 3 Source data transfer size SSIZE
(32 x n) + 40 5 Destination address modulo DMOD
(32 x n) + 45 3 Destination data transfer size DSIZE
(32 x n) + 48 16 Signed Source Address Offset SOFF
(32 x n) + 64 32 Inner minor byte count NBYTES Word 2
(32 x n) + 96 32 Last Source Address Adjustment SLAST Word 3
(32 x n) + 128 32 Destination Address DADDR Word 4
(32 x n) + 160 1 Channel-to-channel Linking on Minor Loop Complete CITER.E_LINK
Word 5
(32 x n) + 161 6 Current Major Iteration Count or
Link Channel Number CITER or
CITER.LINKCH
(32 x n) + 167 9 Current Major Iteration Count CITER
(32 x n) + 176 16 Destination Address Offset (Signed) DOFF