Freescale Semiconductor MPC5565, Reference Manual

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Preface
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor 21-25
The arbitration process is triggered in the following events:
• During the CRC field of the CAN frame
• During the error delimiter field of the CAN frame
• During Intermission, if the winner MB defined in a previous arbitration was deactivated, or if there
was no MB to transmit, but the CPU wrote to the C/S word of any MB after the previous arbitration
finished.
• When MBM is in idle or bus off state and the CPU writes to the C/S word of any MB
• Upon leaving freeze mode
When the arbitration is over, and there is a winner MB for transmission, the frame is transferred to the SMB
for transmission. This is called ‘move out.’ After move out, the CAN transmit machine will start to
transmit the frame according to the CAN protocol rules. FlexCAN2 transmits up to eight data bytes, even
if the data length code (DLC) value is bigger.
At the end of a successful transmission, the value of the free running timer at the beginning of the identifier
field is written into the TIME STAMP field in the MB, the CODE field in the control and status word of
the MB is updated, a status flag is set in CAN
x _IFRL or CAN x _IFRH, and an MB interrupt is generated
if allowed by the corresponding interrupt mask register bit.
21.4.3 Receive Process
The CPU prepares a message buffer for frame reception by executing the following steps:
• Write the CODE field of the control and status word to keep the RX MB as INACTIVE
(CODE = 0000).
• Write the ID word.
• Write the CODE field of the control and status word to mark the MB as EMPTY.
The first and last steps are mandatory.
21.4.3.1 Matching Process
The matching process compares the IDs of all active RX message buffers to newly received frames, so
that, if a match occurs, a newly received frame is transferred (moved in) to the first (that is, lowest entry)
matching MB when the reception queue feature is disabled. Only MBs marked as EMPTY, FULL, or
OVERRUN will participate in the internal matching process at the CRC frame field. The internal matching
process takes place every time the receiver receives an error free frame.
The value of the free running timer is written into the TIME STAMP field in the MB. The ID field, the
DATA field (8 bytes at most), and the LENGTH field are stored, the CODE field is updated, and a status
flag is set in CAN
x _IFRL or CAN x _IFRH, and an interrupt is generated if the corresponding interrupt
mask is enabled in CAN x _IMRL/H.