Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Serial Communication Interface (eSCI)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
20-18 Freescale Semiconductor
20.3.3.8 LIN CRC Polynomial Register (ESCI x _LPR)
ESCI x _LPR n can be written when there are no ongoing transmissions.
20.4 Functional Description
20.4.1 Overview
This section provides a complete functional description of the eSCI module, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 20-11 shows the structure of the eSCI module. The eSCI allows full duplex, asynchronous, NRZ
serial communication between the CPU and remote devices, including other CPUs. The eSCI transmitter
and receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the eSCI, writes the data to be transmitted, and processes received data.
Address: Base + 0x0018 Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0
W
Reset 1 1 0 0 0 1 0 1 1 0 0 1 1 0 0 1
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-10. LIN CRC Polynomial Register (ESCI x _LPR)
Table 20-14. ESCI x _LPR Field Description
Field Description
0–15
P n
Polynomial bit x
n
. Bits P15–P0 are used to define the LIN polynomial - standard is x
15
+ x
14
+ x
10
+ x
8
+ x
7
+ x
4
+
x
3
+ 1 (the polynomial used for the CAN protocol).
16–31 Reserved.