Introduction
MPC5565 Microcontroller Reference Manual, Rev. 1.0
1-16
Freescale Semiconductor
1.4.16
Enhanced Queued A/D Converter (eQADC)
The enhanced queued analog to digital converter (eQADC) module provides accurate and fast conversions
for a wide range of applications. The eQADC provides a parallel interface to two on-chip analog to digital
converters (ADCs), and a single master-to-single slave serial interface to an off-chip external device. The
two on-chip ADCs are designed to access all the analog channels.
The eQADC transfers commands from multiple command FIFOs (CFIFOs) to the on-chip ADCs or to the
external device. The module can also receive data from the on-chip ADCs or from an off-chip external
device into multiple result FIFOs (RFIFOs) in parallel, independently of the CFIFOs. The eQADC
supports software and external hardware triggers from other modules to initiate transfers of commands
from the CFIFOs to the on-chip ADCs or to the external device. It also monitors the fullness of CFIFOs
and RFIFOs, and accordingly generates eDMA or interrupt requests to control data movement between the
FIFOs and the system memory, which is external to the eQADC.
1.4.17
Deserial/Serial Peripheral Interface (DSPI)
The deserial serial peripheral interface (DSPI) module provides a synchronous serial interface for
communication between the MCU and external devices. The DSPI supports pin-count reduction through
serialization and deserialization of eTPU channels, eMIOS channels and memory-mapped registers. The
channels and register content are transmitted using a SPI-like protocol.
The MPC5565 has three DSPI modules (B, C, and D). The DSPIs have three configurations:
•
Serial peripheral interface (SPI) configuration where the DSPIs operate as serial ports only with
support for queues.
•
Deserial serial interface (DSI) configuration where the DSPIs serialize eTPU and eMIOS output
channels, and deserialize the input data by passing it to the eTPU and eMIOS input channels.
•
Combined serial interface (CSI) configuration where the DSPIs operate in both SPI and DSI
configurations, interleaving DSI frames with SPI frames, and giving priority to SPI frames.
For queued operations, the SPI queues reside in system memory external to the DSPI. Data transfers
between the memory and the DSPI FIFOs use the eDMA controller or the host software.
1.4.18
Enhanced Serial Communications Interface (eSCI)
The enhanced serial communications interface (eSCI) allows asynchronous serial communications with
peripheral devices and other MCUs. It includes special support to interface to local interconnect network
(LIN) slave devices. The MPC5565 has two eSCI modules (A and B).
1.4.19
Flexible Controller Area Network (FlexCAN)
The MCU contains three controller area network (FlexCAN) modules. Each FlexCAN module is a
communication controller implementing the CAN protocol according to CAN Specification version 2.0B.
The CAN protocol is designed to be used primarily as a vehicle serial data bus, meeting the specific
requirements of this field: real-time processing, reliable operation in the EMI environment of a vehicle,
cost-effectiveness, and required bandwidth. Each FlexCAN module contains 64 message buffers.
Summary of Contents for MPC5565
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Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...