Frequency Modulated Phase Locked Loop and System Clocks (FMPLL)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
11-25
When programming the FMPLL, do not violate the maximum system clocks frequency, or maximum and
minimum ICO frequency specifications. For determining the MFD value, use a value of zero for the RFD
(translates to divide-by-one). This ensures that the FMPLL does not try to synthesize a frequency out of
its range. Refer to the device
Data Sheet
for more information.
11.4.3.1
Programming System Clock Frequency Without Frequency Modulation
The following steps are required to accommodate the frequency overshoot that can occur when the
PREDIV or MFD bits are changed. If frequency modulation is going to be enabled, the maximum
allowable frequency must be reduced by the programmed
Δ
F
m
.
NOTE
Following these steps produces immediate changes in supply current,
therefore make sure the power supply is decoupled with low ESR
capacitors.
The following steps program the clock frequency without frequency modulation:
1. Determine the value for the PREDIV, MFD, and RFD fields in the synthesizer control register
(FMPLL_SYNCR). Remember to include the
Δ
F
m
if frequency modulation is enabled. The
amount of jitter in the system clocks can be minimized by selecting the maximum MFD factor that
can be paired with an RFD factor to provide the desired frequency. The maximum MFD value that
can be used is determined by the ICO range. Refer to the
Data Sheet
for the maximum frequency
of the ICO.
Table 11-9. Clock-out vs. Clock-in Relationships
Clock Mode
PLL Option
Crystal Reference Mode
External Reference Mode
Dual Controller (1:1) Mode
Bypass Mode
NOTES:
F
sys
= system frequency
F
prediv
= clock frequency after PREDIV.
F
ref_crystal
and F
ref_ext
= clock frequencies at the EXTAL_EXTCLK signal. (Refer to
).
MFD ranges from 0 to 31.
RFD ranges from 0 to 7.
PREDIV normal reset value is 0. Caution: Programming a PREDIV value such that the ICO operates
outside its specified range causes unpredictable results and the FMPLL does not lock. Refer to the
device
Data Sheet
for details on the ICO range.
F
sys
= F
ref_crystal
×
(MFD + 4)
(( 1)
×
2
RFD
)
F
sys
= F
ref_ext
×
(MFD + 4)
(( 1)
×
2
RFD
)
F
sys
= 2F
ref_1:1
F
sys
= F
ref_ext
Summary of Contents for MPC5565
Page 18: ...MPC5565 Microcontroller Reference Manual Devices Supported MPC5565 MPC5565 RM Rev 1 0 09 2007...
Page 34: ...MPC5565 Reference Manual Rev 1 0 Freescale Semiconductor 15...
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Page 553: ...Flash Memory MPC5565 Microcontroller Reference Manual Rev 1 0 13 38 Freescale Semiconductor...
Page 559: ...SRAM MPC5565 Microcontroller Reference Manual Rev 1 0 14 6 Freescale Semiconductor...
Page 973: ...Preface MPC5565 Microcontroller Reference Manual Rev 1 0 21 36 Freescale Semiconductor...
Page 1153: ...Calibration MPC5565 Microcontroller Reference Manual Rev 1 0 B 8 Freescale Semiconductor...
