Freescale Semiconductor MPC5565, Reference Manual

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Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
18-60 Freescale Semiconductor
18.4.2 Command/Result Queues
The command and result queues are actually part of the eQADC system although they are not hardware
implemented inside the eQADC. Instead command and result queues are user-defined queues located in
system memory. Each command queue entry is a 32-bit command message.The last entry of a command
queue has the EOQ bit asserted to indicate that it is the last entry of the queue. The result queue entry is a
16-bit data item.
Refer to Section 18.1.4, “Modes of Operation ,” for a description of the message formats and their flow in
eQADC.
Refer to Section 18.5.5, “Command Queue and Result Queue Usage ,” for examples of how command
queues and result queues can be used.
18.4.3 eQADC Command FIFOs
18.4.3.1 CFIFO Basic Functionality
There are six prioritized CFIFOs located in the eQADC. Each CFIFO is four entries deep, and each CFIFO
entry is 32 bits long. A CFIFO serves as a temporary storage location for the command messages stored
in the command queues in system memory. When a CFIFO is not full, the eQADC sets the corresponding
CFFF bit in
Section 18.3.2.8, “eQADC FIFO and Interrupt Status Registers 0–5 (EQADC_FISRn) .” If
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Reserved
MESSAGE_TAG
(0b1000)
BUSY1 BUSY0
RFIFO Header
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
DETERMINED BY THE EXTERNAL DEVICE
ADC Result
Figure 18-34. Null Message Receive Format for External Device Operation
Table 18-43. Null Message Receive Format for External Device Operation
Field Description
6–7 Reserved.
8–11
MESSAGE_
TAG[0:3]
MESSAGE_TAG field. Refer to Section , “Conversion Command Message Format for On-Chip ADC Operation .”
12–15
BUSY n
[0:1]
BUSY status. Refer to Section , “Result Message Format for External Device Operation .”
16–31 Determined by the external device.