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AES Registers
684
SLAU723A – October 2017 – Revised October 2018
Copyright © 2017–2018, Texas Instruments Incorporated
Advance Encryption Standard Accelerator (AES)
Table 9-10. AES_CTRL Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
21-19
CCM_L
R/W
0x0
L Value.
Defines L, which indicates the width of the length field for CCM
operations the length field in bytes equals the value of CMM-L plus
one.
Supported values for L are:
0x0 = reserved
0x1 = width = 2
0x2 = reserved
0x3 = width = 4
0x7 = width = 8
18
CCM
R/W
0x0
AES-CCM Mode Enable
0x0 = AES-CCM mode is not enabled.
0x1 = AES-CCM mode enabled. This is a combined mode, using
AES for both authentication and encryption. No additional mode
selection is required.
17-16
GCM
R/W
0x0
AES-GCM Mode Enable.
This is a combined mode, using the Galois field-multiplier GF(2
128
)
for authentication and AES-CTR mode for encryption the bits specify
the GCM mode.
0x0 = No operation
0x1 = GHASH with H loaded and Y0-encrypted forced to zero
0x2 = GHASH with H loaded and Y0-encrypted calculated internally
0x3 = Autonomous GHASH (both H and Y0-encrypted calculated
internally)
15
CBCMAC
R/W
0x0
AES-CBC MAC Enable.
The DIRECTION bit must be set to 1 for this mode.
0x0 = AES-CBC MAC mode is not enabled.
0x1 = AES-CBC MAC mode enabled.
14
F9
R/W
0x0
AES f9 Mode Enable.
The AES key size must be set to
128-bit for this mode.
0x0 = f9 mode is not enabled
0x1 = f9 mode is enabled.
13
F8
R/W
0x0
AES f8 Mode Enable.
The KEY_SIZE must be set to
128-bit for this mode.
0x0 = AES f8 mode is not enabled.
0x1 = AES f8 mode is enabled.
12-11
XTS
R/W
0x0
AES-XTS Operation Enabled.
The bits specify the XTS mode.
0x0 = No operation
0x1 = Previous/intermediate tweak value and j loaded (value is
loaded via IV, j is loaded via the AAD length register)
0x2 = Key2, n and j are loaded (n is loaded via IV, j is loaded via the
AAD length register)
0x3 = Key2 and n are loaded; j=0 (n is loaded via IV)
10
CFB
R/W
0x0
Full block AES cipher feedback mode (CFB128) Enable
0x0 = AES-CFB mode is not enabled.
0x1 = AES-CFB mode is enabled.
9
ICM
R/W
0x0
AES Integer Counter Mode (ICM) Enable.
This is a counter mode with a 16-bit wide counter.
0x0 = AES-ICM mode is not enabled.
0x1 = AES-ICM mode is enabled.