
System Control Registers
373
SLAU723A – October 2017 – Revised October 2018
Copyright © 2017–2018, Texas Instruments Incorporated
System Control
Table 4-141. DCGCTIMER Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
2
D2
R/W
0x0
16/32-Bit General-Purpose Timer 2 Deep-Sleep Mode Clock Gating
Control
0x0 = 16/32-bit general-purpose timer module 2 is disabled in deep-
sleep mode.
0x1 = Enable and provide a clock to 16/32-bit general-purpose timer
module 2 in deep-sleep mode.
1
D1
R/W
0x0
16/32-Bit General-Purpose Timer 1 Deep-Sleep Mode Clock Gating
Control
0x0 = 16/32-bit general-purpose timer module 1 is disabled in deep-
sleep mode.
0x1 = Enable and provide a clock to 16/32-bit general-purpose timer
module 1 in deep-sleep mode.
0
D0
R/W
0x0
16/32-Bit General-Purpose Timer 0 Deep-Sleep Mode Clock Gating
Control
0x0 = 16/32-bit general-purpose timer module 0 is disabled in deep-
sleep mode.
0x1 = Enable and provide a clock to 16/32-bit general-purpose timer
module 0 in deep-sleep mode.