555-233-119
958
Issue 5 October 2002
Data Channel Remote Maintenance Loop Around
Test (#109)
This test verifies the integrity of the entire DATA-CHL (that is, the software, dual
port RAM, and hardware that compose it). It verifies that a connection can be
established over the DATA-CHL and that the DATA-CHL can correctly send and
receive data over the connection (that is, over the TDM Bus). The test actually
involves two DATA-CHLs: the DATA-CHL that is the target of the test and a
second, arbitrary, unbusy DATA-CHL. A connection is set up by placing a call out
from the arbitrary DATA-CHL and into the target DATA-CHL. Data is looped over
the connection in each direction (that is, the target DATA-CHL is tested as both a
sender of data and a receiver of data). The test checks that the data received by
one DATA-CHL is the same as the data that was sent by the other DATA-CHL.
Because it establishes a connection between two Data Channels (DATA-CHLs)
across the TDM Bus, this test does more than just verify the integrity of the target
DATA-CHL. It also verifies the integrity of the TDM Bus and Tone-Clock circuit
pack (by sending and receiving data).
Table 174.
TEST #108 Data Channel Dual Port RAM Test
Error
Code
Test
Result
Description/Recommendation
1000
ABORT
System resources required to run this test are not available.
1. Retry the command at 1-minute intervals a maximum of 5 times.
FAIL
The dual port RAM is not functioning correctly. Either the software cannot
correctly read from it and/or write to it or the hardware cannot correctly read
from it and/or write to it. Connections cannot be established over the
DATA-CHLs.
1. Execute the command again.
2. If the problem persists, replace the Processor circuit pack. After the
Processor circuit pack has been replaced, its Time-of-Day clock must
be set using the set time command.
PASS
The dual port RAM is functioning. Connections can be established over the
DATA-CHLs.
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