PROCR (RISC Processor Circuit Pack TN2402/TN798)
Issue 5 October 2002
1539
555-233-119
System Technician-Demanded Tests: Descriptions
and Error Codes
Always investigate tests in the order presented in the table below. By clearing
error codes associated with the Processor Bus Time-out Exception Test, for
example, you may also clear errors generated from other tests in the testing
sequence.
Notes:
a. Refer to
‘‘PR-MEM (RISC Memory)’’
for a description of these tests.
b. There are Functional Memory Test errors against the Processor circuit
pack. This test is run only via a reset system 4 command or a reset system
5 command.
c. Refer to
‘‘PR-MAINT (Maintenance Processor)’’
for a description of these
tests.
Order of Investigation
Short Test
Sequence
Long Test
Sequence
D/ND
1
1.
D = Destructive; ND = Nondestructive
Processor Cache Test (#895)
X
ND
Processor Cache Audit (#896)
X
X
ND
Processor Bus Time-out Exception Test (#82)
X
X
ND
Processor BOOTPROM Checksum Test (#80)
X
X
ND
Processor Write Buffer Test (#900)
X
X
ND
Memory Burst Read Test (#908)(a)
X
X
ND
Read All Memory Test (#85)(a)
X
ND
Memory Parity Error Detection Test (#87)(a)
X
X
ND
Flash Memory Checksum Test (#86)(a)
X
ND
Memory Functional Test (#332) (a) (b)
X
D
MTP Outpulse Relay Test (#102) (c)
X
X
ND
MTP External Modem Present Test (#230) (c)
X
X
ND
MTP Analog Loop Around Test (#103) (c)
X
X
ND
MTP Sanity Handshake Test (#106) (c)
X
X
ND
MTP SAT Loop Around Test (#228) (c)
X
X
ND
MTP Aux Loop Around Test (#229) (c)
X
X
ND
MTP Reset Test (#101) (c)
X
D
MTP Dual Port Ram Test (#104) (c)
X
D
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