2:504
Volume 2, Part 2: About the System Programmer’s Guide
Chapter 4, “Context Management”
describes how operating systems need to preserve
Itanium register contents. In addition to spilling and filling a register’s data value, the
Itanium architecture also requires software to preserve control and data speculative
state associated with that register, i.e. its NaT bit and ALAT state. This chapter also
discusses system architecture mechanisms that allow an operating system to
significantly reduce the number of registers that need to be spilled/filled on
interruptions, system calls, and context switches. These optimizations improve the
performance of an Itanium architecture-based operating system by reducing the
amount of required memory traffic. This chapter is useful for operating system
programmers.
Chapter 5, “Memory Management”
introduces various memory management strategies
in the Itanium architecture: region register model, protection keys, and the virtual hash
page table usage models are described. This chapter is of interest to virtual memory
management software developers.
Chapter 6, “Runtime Support for Control and Data Speculation”
describes the operating
system support that is required for control and data speculation. This chapter describes
various speculation software models and their associated operating system
implications. This chapter is of interest to operating system developers and compiler
writers.
Chapter 7, “Instruction Emulation and Other Fault Handlers”
describes a variety of
instruction emulation handlers that Itanium architecture-based operating systems are
expected to support. This chapter is useful for operating system developers.
Chapter 8, “Floating-point System Software”
discusses how processors based on the
Itanium architecture handle floating-point numeric exceptions and how the Itanium
architecture-based software stack provides complete IEEE-754 compliance. This
includes a discussion of the floating-point software assist firmware, the FP SWA EFI
driver. This chapter also describes how Itanium architecture-based operating systems
are expected to support IEEE floating-point exception filters. This chapter is useful for
operating system developers and floating-point numerics experts.
Chapter 9, “IA-32 Application Support”
outlines how software needs to perform
instruction set transitions, and what low-level kernel handlers are required in an
Itanium architecture-based operating system to support IA-32 applications. This
chapter is useful for operating system developers.
Chapter 10, “External Interrupt Architecture”
describes the external interrupt
architecture with a focus on how external asynchronous interrupt handling can be
controlled by software. Basic interrupt prioritization, masking, and harvesting
capabilities are discussed in this chapter. This chapter is of interest to operating system
developers and to device driver writers.
Chapter 11, “I/O Architecture”
describes the I/O architecture with a focus on platform
considerations and support for the existing IA-32 I/O port space platform
infrastructure. This chapter is of interest to operating system developers and to device
driver writers.
Chapter 12, “Performance Monitoring Support”
describes the performance monitor
architecture with a focus on what kind of operating system support is needed from
Itanium architecture-based operating systems. This chapter is of interest to operating
system and performance tool developers.
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...