Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1843 / 1898

Volume 4: IA-32 SSE Instruction Reference 4:541
MULSS: Scalar Single-FP Multiply
xmm1[31-0] = xmm1[31-0] * xmm2/m32[31-0];
xmm1[63-32] = xmm1[63-32];
xmm1[95-64] = xmm1[95-64];
xmm1[127-96] = xmm1[127-96];
Description:
The MULSS instructions multiply the lowest SP FP numbers of both their operands; the
upper 3 fields are passed through from xmm1.
FP Exceptions:
None
Numeric Exceptions:
Overflow, Underflow, Invalid, Precision, Denormal.
Protected Mode Exceptions:
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF (fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #AC for unaligned memory
reference. To enable #AC exceptions, three conditions must be true(CR0.AM is set;
EFLAGS.AC is set; current CPL is 3); #XM for an unmasked SSE numeric exception
(CR4.OSXMMEXCPT =1); #UD for an unmasked SSE numeric exception
(CR4.OSXMMEXCPT =0).
Real Address Mode Exceptions:
Interrupt 13 if any part of the operand would lie outside of the effective address space
from 0 to 0FFFFH;
#UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #XM for an
unmasked SSE numeric exception (CR4.OSXMMEXCPT =1); #UD for an unmasked SSE
numeric exception (CR4.OSXMMEXCPT =0).
Virtual 8086 Mode Exceptions:
Same exceptions as in Real Address Mode; #AC for unaligned memory reference if the
current privilege level is 3; #PF (fault-code) for a page fault.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT Register
Consumption Fault
Itanium Mem Faults VHPT Data Fault, Data TLB Fault, Alternate Data TLB Fault, Data
Page Not Present Fault, Data NaT Page Consumption Abort, Data
Key Miss Fault, Data Key Permission Fault, Data Access Rights
Fault, Data Access Bit Fault
Opcode Instruction Description
F3,0F,59,/r MULSS xmm1 xmm2/m32 Multiply the lowest SP FP number in XMM2/Mem to XMM1.