4:376
Volume 4: Base IA-32 Instruction Reference
STOS/STOSB/STOSW/STOSD—Store String Data
Description
Stores a byte, word, or doubleword from the AL, AX, or EAX register, respectively, into
the destination operand. The destination operand is a memory location at the address
ES:EDI. (When the operand-size attribute is 16, the DI register is used as the
source-index register.) The ES segment cannot be overridden with a segment override
prefix.
The STOSB, STOSW, and STOSD mnemonics are synonyms of the byte, word, and
doubleword versions of the STOS instructions. They are simpler to use, but provide no
type or segment checking. (For the STOS instruction, “ES:EDI” must be explicitly
specified in the instruction.)
After the byte, word, or doubleword is transfer from the AL, AX, or EAX register to the
memory location, the EDI register is incremented or decremented automatically
according to the setting of the DF flag in the EFLAGS register. (If the DF flag is 0, the
EDI register is incremented; if the DF flag is 1, the EDI register is decremented.) The
EDI register is incremented or decremented by 1 for byte operations, by 2 for word
operations, or by 4 for doubleword operations.
The STOS, STOSB, STOSW, and STOSD instructions can be preceded by the REP prefix
for block loads of ECX bytes, words, or doublewords. More often, however, these
instructions are used within a LOOP construct, because data needs to be moved into the
AL, AX, or EAX register before it can be stored. See
Repeat String Operation Prefix” on page 4:337
for a description of the REP prefix.
Operation
IF (byte store)
THEN
DEST
AL;
THEN IF DF = 0
THEN (E)DI
1;
ELSE (E)DI
-1;
FI;
ELSE IF (word store)
THEN
DEST
AX;
THEN IF DF = 0
THEN DI
2;
ELSE DI
-2;
FI;
ELSE (* doubleword store *)
Opcode
Instruction
Description
AA
STOS ES:(E)DI
Store AL at address ES:(E)DI
AB
STOS ES:DI
Store AX at address ES:DI
AB
STOS ES:EDI
Store EAX at address ES:EDI
AA
STOSB
Store AL at address ES:(E)DI
AB
STOSW
Store AX at address ES:DI
AB
STOSD
Store EAX at address ES:EDI
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...