4:276
Volume 4: Base IA-32 Instruction Reference
LOOP/LOOP
cc
—Loop According to ECX Counter
Description
Performs a loop operation using the ECX or CX register as a counter. Each time the
LOOP instruction is executed, the count register is decremented, then checked for 0. If
the count is 0, the loop is terminated and program execution continues with the
instruction following the LOOP instruction. If the count is not zero, a near jump is
performed to the destination (target) operand, which is presumably the instruction at
the beginning of the loop. If the address-size attribute is 32 bits, the ECX register is
used as the count register; otherwise the CX register is used.
The target instruction is specified with a relative offset (a signed offset relative to the
current value of the instruction pointer in the EIP register). This offset is generally
specified as a label in assembly code, but at the machine code level, it is encoded as a
signed, 8-bit immediate value, which is added to the instruction pointer. Offsets of -128
to +127 are allowed with this instruction.
Some forms of the loop instruction (LOOP
cc
) also accept the ZF flag as a condition for
terminating the loop before the count reaches zero. With these forms of the instruction,
a condition code (
cc
) is associated with each instruction to indicate the condition being
tested for. Here, the LOOP
cc
instruction itself does not affect the state of the ZF flag;
the ZF flag is changed by other instructions in the loop.
All branches are converted to code fetches of one or two cache lines, regardless of jump
address or cacheability.
Operation
IF AddressSize = 32
THEN
Count is ECX;
ELSE (* AddressSize = 16 *)
Count is CX;
FI;
Count
Count - 1;
IF instruction is not LOOP
THEN
IF (instruction = LOOPE) OR (instruction = LOOPZ)
THEN
IF (ZF =1) AND (Count
0)
THEN BranchCond
1;
ELSE BranchCond
0;
FI;
FI;
Opcode
Instruction
Description
E2
cb
LOOP
rel8
Decrement count; jump short if count
0
E1
cb
LOOPE
rel8
Decrement count; jump short if count
0 and ZF=1
E1
cb
LOOPZ
rel8
Decrement count; jump short if count
0 and ZF=1
E0
cb
LOOPNE
rel8
Decrement count; jump short if count
0 and ZF=0
E0
cb
LOOPNZ
rel8
Decrement count; jump short if count
0 and ZF=0
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...