Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1625 / 1898

Volume 4: Base IA-32 Instruction Reference 4:323
PUSHA/PUSHAD—Push All General-Purpose Registers
Description
Push the contents of the general-purpose registers onto the procedure stack. The
registers are stored on the stack in the following order: EAX, ECX, EDX, EBX, EBP, ESP
(original value), EBP, ESI, and EDI (if the current operand-size attribute is 32) and AX,
CX, DX, BX, SP (original value), BP, SI, and DI (if the operand-size attribute is 16).
(These instructions perform the reverse operation of the POPA/POPAD instructions.)
The value pushed for the ESP or SP register is its value before prior to pushing the first
register (see the “Operation” below).
The PUSHA (push all) and PUSHAD (push all double) mnemonics reference the same
opcode. The PUSHA instruction is intended for use when the operand-size attribute is
16 and the PUSHAD instruction for when the operand-size attribute is 32. Some
assemblers may force the operand size to 16 when PUSHA is used and to 32 when
PUSHAD is used. Others may treat these mnemonics as synonyms (PUSHA/PUSHAD)
and use the current setting of the operand-size attribute to determine the size of values
to be pushed from the stack, regardless of the mnemonic used.
In the real-address mode, if the ESP or SP register is 1, 3, or 5 when the
PUSHA/PUSHAD instruction is executed, the processor shuts down due to a lack of
stack space. No exception is generated to indicate this condition.
Operation
IF OperandSize = 32 (* PUSHAD instruction *)
THEN
Temp

(ESP);
Push(EAX);
Push(ECX);
Push(EDX);
Push(EBX);
Push(Temp);
Push(EBP);
Push(ESI);
Push(EDI);
ELSE (* OperandSize = 16, PUSHA instruction *)
Temp

(SP);
Push(AX);
Push(CX);
Push(DX);
Push(BX);
Push(Temp);
Push(BP);
Push(SI);
Push(DI);
FI;
Opcode Instruction Description
60 PUSHA Push AX, CX, DX, BX, original SP, BP, SI, and DI
60 PUSHAD Push EAX, ECX, EDX, EBX, original ESP, EBP, ESI, and EDI