Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 953 / 1898

3:54 Volume 3: Instruction Reference
extr
extr — Extract
Format: (
qp
) extr
r
1
=
r
3
,
pos
6
,
len
6
signed_form I11
(
qp
) extr.u
r
1
=
r
3
,
pos
6
,
len
6
unsigned_form I11
Description:
A field is extracted from GR
r
3
, either zero extended or sign extended, and placed
right-justified in GR
r
1
. The field begins at the bit position given by the second operand
and extends
len
6
bits to the left. The bit position where the field begins is specified by
the
pos
6
immediate. The extracted field is sign extended in the signed_form or zero
extended in the unsigned_form. The sign is taken from the most significant bit of the
extracted field. If the specified field extends beyond the most significant bit of GR
r
3
,
the sign is taken from the most significant bit of GR
r
3
. The immediate value
len
6
can be
any number in the range 1 to 64, and is encoded as
len
6
-1 in the instruction. The
immediate value
pos
6
can be any value in the range 0 to 63.
The operation of
extr r1 = r3, 7, 50
is illustrated in Figure 2-7 .
Operation: if (PR[ qp ]) {
check_target_register( r
1
);
tmp_len = len
6
;
if ( pos
6
+ tmp_len u> 64)
tmp_len = 64 - pos
6
;
if (unsigned_form)
GR[ r
1
] = zero_ext(shift_right_unsigned(GR[r3], pos6), tmp_len);
else // signed_form
GR[ r
1
] = sign_ext(shift_right_unsigned(GR[r3], pos6), tmp_len);
GR[ r
1
].nat = GR[ r
3
].nat;
}
Interruptions:
Illegal Operation fault
Figure 2-7. Extract Example
56 7 0
49 0
GR r
3
:
GR r
1
:
63
63
Sign