Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1376 / 1898

4:74 Volume 4: Base IA-32 Instruction Reference
CMPXCHG—Compare and Exchange
Description
Compares the value in the AL, AX, or EAX register (depending on the size of the
operand) with the first operand (destination operand). If the two values are equal, the
second operand (source operand) is loaded into the destination operand. Otherwise,
the destination operand is loaded into the AL, AX, or EAX register.
This instruction can be used with a LOCK prefix to allow the instruction to be executed
atomically. To simplify the interface to the processor’s bus, the destination operand
receives a write cycle without regard to the result of the comparison. The destination
operand is written back if the comparison fails; otherwise, the source operand is written
into the destination. (The processor never produces a locked read without also
producing a locked write.)
Operation
(* accumulator = AL, AX, or EAX, depending on whether *)
(* a byte, word, or doubleword comparison is being performed*)
IF Itanium System Environment AND External_Atomic_Lock_Required AND DCR.lc
THEN IA-32_Intercept(LOCK,CMPXCHG);
IF accumulator = DEST
THEN
ZF

1
DEST

SRC
ELSE
ZF

0
accumulator

DEST
FI;
Flags Affected
The ZF flag is set if the values in the destination operand and register AL, AX, or EAX
are; otherwise it is cleared. The CF, PF, AF, SF, and OF flags are set according to the
results of the comparison operation.
Opcode Instruction Description
0F B0/ r CMPXCHG r/m8,r8 Compare AL with r/m8 . If equal, ZF is set and r8 is loaded into
r/m8 . Else, clear ZF and load r/m8 into AL.
0F B1/ r CMPXCHG r/m16,r16 Compare AX with r/m16 . If equal, ZF is set and r16 is loaded
into r/m16 . Else, clear ZF and load r/m16 into AL
0F B1/ r CMPXCHG r/m32,r32 Compare EAX with r/m32 . If equal, ZF is set and r32 is loaded
into r/m32 . Else, clear ZF and load r/m32 into AL