Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 63 / 1898

1:52 Volume 1, Part 1: Application Programming Model
4.2.3 32-bit Addresses and Integers
Support for 32-bit addresses is provided in the form of add instructions that perform
region bit copying. This supports the virtual address translation model (see
“32-bit
Virtual Addressing” on page 2:71 for details). The add 32-bit pointer instruction (
addp
)
adds two registers or a register and an immediate, zeroes the most significant 32-bits
of the result, and copies bits 31:30 of the second source to bits 62:61 of the result. The
shladdp
instruction operates similarly but shifts the first source to the left by 1 to 4 bits
before performing the add, and is provided only in the two-register form.
In addition, support for 32-bit integers is provided through 32-bit compare instructions
and instructions to perform sign and zero extension. Compare instructions are
described in
“Compare Instructions and Predication” on page 1:54 . The sign and zero
extend (
sxt
,
zxt
) instructions take an 8-bit, 16-bit, or 32-bit value in a register, and
produce a properly extended 64-bit result.
Table 4-5 summarizes 32-bit pointer and 32-bit integer instructions.
4.2.4 Bit Field and Shift Instructions
Four classes of instructions are defined for shifting and operating on bit fields within a
general register: variable shifts, fixed shift-and-mask instructions, a 128-bit-input
funnel shift, and special compare operations to test an individual bit within a general
register. The compare instructions for testing a single bit (
tbit
), or for testing the NaT
bit (
tnat
) are described in “Compare Instructions and Predication” on page 1:54 .
The variable shift instructions shift the contents of a general register by an amount
specified by another general register. The shift right signed (
shr
) and shift right
unsigned (
shr.u
) instructions shift the contents of a register to the right with the
vacated bit positions filled with the sign bit or zeroes respectively. The shift left (
shl
)
instruction shifts the contents of a register to the left.
The fixed shift-and-mask instructions (
extr
,
dep
) are generalized forms of fixed shifts.
The extract instruction (
extr
) copies an arbitrary bit field from a general register to the
least-significant bits of the target register. The remaining bits of the target are written
with either the sign of the bit field (
extr
) or with zero (
extr.u
). The length and starting
Table 4-4. Integer Logical Instructions
Mnemonic Operation
and
Logical and
or
Logical or
andcm
Logical and complement
xor
Logical exclusive or
Table 4-5. 32-bit Pointer and 32-bit Integer Instructions
Mnemonic Operation
addp
32-bit pointer addition
shladdp
Shift left and add 32-bit pointer
sxt
Sign extend
zxt
Zero extend