Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 979 / 1898

3:80 Volume 3: Instruction Reference
fmerge
fmerge — Floating-point Merge
Format: (
qp
) fmerge.ns
f
1
=
f
2
,
f
3
neg_sign_form F9
(
qp
) fmerge.s
f
1
=
f
2
,
f
3
sign_form F9
(
qp
) fmerge.se
f
1
=
f
2
,
f
3
sign_exp_form F9
Description:
Sign, exponent and significand fields are extracted from FR
f
2
and FR
f
3
, combined, and
the result is placed in FR
f
1
.
For the neg_sign_form, the sign of FR
f
2
is negated and concatenated with the exponent
and the significand of FR
f
3
. This form can be used to negate a floating-point number by
using the same register for FR
f
2
and FR
f
3
.
For the sign_form, the sign of FR
f
2
is concatenated with the exponent and the
significand of FR
f
3
.
For the sign_exp_form, the sign and exponent of FR
f
2
is concatenated with the
significand of FR
f
3
.
For all forms, if either FR
f
2
or FR
f
3
is a NaTVal, FR
f
1
is set to NaTVal instead of the
computed result.
Figure 2-8. Floating-point Merge Negative Sign Operation
Figure 2-9. Floating-point Merge Sign Operation
Figure 2-10. Floating-point Merge Sign and Exponent Operation
81 0 80 64 63 81 0 80 64 63
81 0 80 64 63
FR
f
2
Negated
Sign Bit
FR
f
3
FR
f
1
81 0 80 64 63 81 0 80 64 63
81 0 80 64 63
FR
f
2
FR
f
3
FR
f
1
81
0
80 64 63 81 0 80 64 63
81 0 80 64 63
FR
f
1
FR
f
3
FR
f
2