4:364
Volume 4: Base IA-32 Instruction Reference
SHRD—Double Precision Shift Right
Description
Shifts the first operand (destination operand) to the right the number of bits specified
by the third operand (count operand). The second operand (source operand) provides
bits to shift in from the left (starting with the most significant bit of the destination
operand). The destination operand can be a register or a memory location; the source
operand is a register. The count operand is an unsigned integer that can be an
immediate byte or the contents of the CL register. Only bits 0 through 4 of the count
are used, which masks the count to a value between 0 and 31. If the count is greater
than the operand size, the result in the destination operand is undefined.
If the count is 1 or greater, the CF flag is filled with the last bit shifted out of the
destination operand. For a 1-bit shift, the OF flag is set if a sign change occurred;
otherwise, it is cleared. If the count operand is 0, the flags are not affected.
The SHRD instruction is useful for multiprecision shifts of 64 bits or more.
Operation
COUNT
COUNT MOD 32;
SIZE
OperandSize
IF COUNT = 0
THEN
no operation
ELSE
IF COUNT
SIZE
THEN (* Bad parameters *)
DEST is undefined;
CF, OF, SF, ZF, AF, PF are undefined;
ELSE (* Perform the shift *)
CF
BIT[DEST, COUNT - 1]; (* last bit shifted out on exit *)
FOR i
0 TO SIZE - 1 - COUNT
DO
BIT[DEST, i]
BIT[DEST
,
i - COUNT];
OD;
FOR i
SIZE - COUNT TO SIZE - 1
DO
BIT[DEST
,
i]
BIT[inBits,i+COUNT - SIZE];
OD;
FI;
FI;
Opcode
Instruction
Description
0F AC
SHRD
r/m16,r16,imm8
Shift
r/m16
to right
imm8
places while shifting bits from
r16
in
from the left
0F AD
SHRD
r/m16,r16
,CL
Shift
r/m16
to right CL places while shifting bits from
r16
in from
the left
0F AC
SHRD
r/m32,r32,imm8
Shift
r/m32
to right
imm8
places while shifting bits from
r32
in
from the left
0F AD
SHRD
r/m32,r32
,CL
Shift
r/m32
to right CL places while shifting bits from
r32
in from
the left
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...