Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 79 / 1898

1:68 Volume 1, Part 1: Application Programming Model
3. Software accesses the RSE backing store with advanced loads. See Section 6.9,
“RSE and ALAT Interaction” on page 2:146 (since RSE stores do not invalidate
ALAT entries).
4. Software explicitly changes the virtual to physical register mapping on stacked
registers by switching the RSE backing stores. See Section 6.11.3, “Synchronous
Backing Store Switch” on page 2:148 .
4.4.5.4 Combining Control and Data Speculation
Control speculation and data speculation are not mutually exclusive; a given load may
be both control and data speculative. Both control speculative (
ld.sa
,
ldf.sa
,
ldfp.sa
) and non-control speculative (
ld.a
,
ldf.a
,
ldfp.a
) variants of advanced
loads are defined for general and floating-point registers. If a speculative advanced
load generates a deferred exception token then:
1. Any existing ALAT entry with the same ALAT register tag is invalidated.
2. No new ALAT entry is allocated.
3. If the target of the load was a general-purpose register, its NaT bit is set.
4. If the target of the load was a floating-point register, then NaTVal is written to the
target register.
If a speculative advanced load does not generate a deferred exception, then its
behavior is the same as the corresponding non-control speculative advanced load.
Since there can be no matching entry in the ALAT after a deferred fault, a single
advanced load check or check load is sufficient to check both for data speculation
failures and to detect deferred exceptions.
4.4.5.5 Instruction Completers for ALAT Management
To help the compiler manage the allocation and deallocation of ALAT entries, two
variants of advanced load checks and check loads are provided: variants with clear
(
chk.a.clr
,
ld.c.clr
,
ld.c.clr.acq
,
ldf.c.clr
,
ldfp.c.clr
) and variants with no
clear (
chk.a.nc
,
ld.c.nc
,
ldf.c.nc
,
ldfp.c.nc
).
The clear variants are used when the compiler knows that the ALAT entry will not be
used again and wants the entry explicitly removed. This allows software to indicate
when entries are unneeded, making it less likely that a useful entry will be
unnecessarily forced out because all entries are currently allocated.
For the clear variants of check load, any ALAT entry with the same ALAT register tag is
invalidated independently of whether the address or size fields of the check load and
the corresponding advanced load match. For
chk.a.clr
, the entry is guaranteed to be
invalidated only when the instruction falls through (the recovery code is not executed).
Thus, a failing
chk.a.clr
may or may not clear any matching ALAT entries. In such
cases, the recovery code must explicitly invalidate the entry in question if program
correctness depends on the entry being absent after a failed
chk.a.clr
.
Non-clear variants of both kinds of data speculation checks act as a hint to the
processor that an existing entry should be maintained in the ALAT or that a new entry
should be allocated when a matching ALAT entry doesn’t exist. Such variants can be
used within loops to check advanced loads which were presumed loop-invariant and