Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1071 / 1898

3:172 Volume 3: Instruction Reference
mov ar
mov — Move Application Register
Format: (
qp
) mov
r
1
=
ar
3
pseudo-op
(
qp
) mov
ar
3
=
r
2
pseudo-op
(
qp
) mov
ar
3
=
imm
8
pseudo-op
(
qp
) mov.i
r
1
=
ar
3
i_form, from_form I28
(
qp
) mov.i
ar
3
=
r
2
i_form, register_form, to_form I26
(
qp
) mov.i
ar
3
=
imm
8
i_form, immediate_form, to_form I27
(
qp
) mov.m
r
1
=
ar
3
m_form, from_form M31
(
qp
) mov.m
ar
3
=
r
2
m_form, register_form, to_form M29
(
qp
) mov.m
ar
3
=
imm
8
m_form, immediate_form, to_form M30
Description:
The source operand is copied to the destination register.
In the from_form, the application register specified by ar
3
is copied into GR r
1
and the
corresponding NaT bit is cleared.
In the to_form, the value in GR r
2
(in the register_form), or the sign-extended value in
imm
8
(in the immediate_form), is placed in AR ar
3
. In the register_form if the NaT bit
corresponding to GR r
2
is set, then a Register NaT Consumption fault is raised.
Only a subset of the application registers can be accessed by each execution unit (M or
I).
Table 3-3 on page 1:28 indicates which application registers may be accessed from
which execution unit type. An access to an application register from the wrong unit type
causes an Illegal Operation fault.
This instruction has multiple forms with the pseudo operation eliminating the need for
specifying the execution unit. Accesses of the ARs are always implicitly serialized. While
implicitly serialized, read-after-write and write-after-write dependency violations must
be avoided (e.g., setting CCV, followed by
cmpxchg
in the same instruction group, or
simultaneous writes to the UNAT register by
ld.fill
and mov to UNAT).