4:240
Volume 4: Base IA-32 Instruction Reference
Jcc—Jump if Condition Is Met
(Continued)
Description
Checks the state of one or more of the status flags in the EFLAGS register (CF, OF, PF,
SF, and ZF) and, if the flags are in the specified state (condition), performs a jump to
the target instruction specified by the destination operand. A condition code (
cc
) is
associated with each instruction to indicate the condition being tested for. If the
condition is not satisfied, the jump is not performed and execution continues with the
instruction following the J
cc
instruction.
The target instruction is specified with a relative offset (a signed offset relative to the
current value of the instruction pointer in the EIP register). A relative offset (
rel8
,
rel16,
or
rel32
) is generally specified as a label in assembly code, but at the machine code
level, it is encoded as a signed, 8-bit or 32-bit immediate value, which is added to the
instruction pointer. Instruction coding is most efficient for offsets of -128 to +127. If
the operand-size attribute is 16, the upper two bytes of the EIP register are cleared to
0s, resulting in a maximum instruction pointer size of 16 bits.
The conditions for each J
cc
mnemonic are given in the “Description” column of the
above table. The terms “less” and “greater” are used for comparisons of signed integers
and the terms “above” and “below” are used for unsigned integers.
Opcode
Instruction
Description
0F 8D
cw/cd
JGE
rel16/32
Jump near if greater or equal (SF=OF)
0F 8C
cw/cd
JL
rel16/32
Jump near if less (SF<>OF)
0F 8E
cw/cd
JLE
rel16/32
Jump near if less or equal (ZF=1 or SF<>OF)
0F 86
cw/cd
JNA
rel16/32
Jump near if not above (CF=1 or ZF=1)
0F 82
cw/cd
JNAE
rel16/32
Jump near if not above or equal (CF=1)
0F 83
cw/cd
JNB
rel16/32
Jump near if not below (CF=0)
0F 87
cw/cd
JNBE
rel16/32
Jump near if not below or equal (CF=0 and ZF=0)
0F 83
cw/cd
JNC
rel16/32
Jump near if not carry (CF=0)
0F 85
cw/cd
JNE
rel16/32
Jump near if not equal (ZF=0)
0F 8E
cw/cd
JNG
rel16/32
Jump near if not greater (ZF=1 or SF<>OF)
0F 8C
cw/cd
JNGE
rel16/32
Jump near if not greater or equal (SF<>OF)
0F 8D
cw/cd
JNL
rel16/32
Jump near if not less (SF=OF)
0F 8F
cw/cd
JNLE
rel16/32
Jump near if not less or equal (ZF=0 and SF=OF)
0F 81
cw/cd
JNO
rel16/32
Jump near if not overflow (OF=0)
0F 8B
cw/cd
JNP
rel16/32
Jump near if not parity (PF=0)
0F 89
cw/cd
JNS
rel16/32
Jump near if not sign (SF=0)
0F 85
cw/cd
JNZ
rel16/32
Jump near if not zero (ZF=0)
0F 80
cw/cd
JO
rel16/32
Jump near if overflow (OF=1)
0F 8A
cw/cd
JP
rel16/32
Jump near if parity (PF=1)
0F 8A
cw/cd
JPE
rel16/32
Jump near if parity even (PF=1)
0F 8B
cw/cd
JPO
rel16/32
Jump near if parity odd (PF=0)
0F 88
cw/cd
JS
rel16/32
Jump near if sign (SF=1)
0F 84
cw/cd
JZ
rel16/32
Jump near if 0 (ZF=1)
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...