1:48
Volume 1, Part 1: Application Programming Model
The local and output areas of a frame can be re-sized using the
alloc
instruction which
specifies immediates that determine the size of frame (sof) and size of locals (sol).
Note:
In the assembly language,
alloc
uses three immediate operands to determine
the values of sol and sof: the size of inputs; the size of locals; and the size of
outputs. The value of sol is determined by adding the size of inputs immediate
and the size of locals immediate; the value of sof is determined by adding all
three immediates.
The value of sof specifies the size of the entire stacked subset visible to the current
procedure; the value of sol specifies the size of the local area. The size of the output
area is determined by the difference between sof and sol. The values of these
parameters for the currently active procedure are maintained in the Current Frame
Marker (CFM).
Reading a stacked register outside the current frame will return an undefined result.
Writing a stacked register outside the current frame will cause an Illegal Operation
fault.
When a
br.call
or
brl.call
is executed, the CFM is copied to the Previous Frame
Marker (PFM) field in the Previous Function State application register (PFS), and the
callee’s frame is created as follows:
• The stacked registers are renamed such that the first register in the caller’s output
area becomes GR 32 for the callee
• The size of the local area is set to zero
• The size of the callee’s frame (sof
b1
) is set to the size of the caller’s output area
(sof
a
- sol
a
)
Values in the output area of the caller’s register stack frame are visible to the callee.
This overlap permits parameter and return value passing between procedures to take
place entirely in registers.
Procedure frames may be dynamically re-sized by issuing an
alloc
instruction. An
alloc
instruction causes no renaming, but only changes the size of the register stack
frame and the partitioning between local and output areas. Typically, when a procedure
is called, it will allocate some number of local registers for its use (which will include the
parameters passed to it in the caller’s output registers), plus an output area (for
passing parameters to procedures it will call). Newly allocated registers (including their
NaT bits) have undefined values.
When a
br.ret
is executed, CFM is restored from PFM and the register renaming is
restored to the caller’s configuration. The PFM is procedure local state and must be
saved and restored by non-leaf procedures. The CFM is not directly accessible in
application programs and is updated only through the execution of calls, returns,
alloc
,
cover
, and
clrrrb
.
depicts the behavior of the register stack on a procedure call from procA
(caller) to procB (callee). The state of the register stack is shown at four points: prior to
the call, immediately following the call, after procB has executed an
alloc
, and after
procB returns to procA.
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...