Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1059 / 1898

3:160 Volume 3: Instruction Reference
ldf
}
if (imm_base_update_form) { // update base register
GR[ r
3
] = GR[ r
3
] + sign_ext( imm
9
, 9);
GR[ r
3
].nat = GR[ r
3
].nat;
} else if (reg_base_update_form) {
GR[ r
3
] = GR[ r
3
] + GR[ r
2
];
GR[ r
3
].nat = GR[ r
3
].nat || GR[ r
2
].nat;
}
if ((reg_base_update_form || imm_base_update_form) && !GR[ r
3
].nat)
mem_implicit_prefetch(GR[ r
3
], ldhint , itype);
fp_update_psr( f
1
);
}
Interruptions:
Illegal Operation fault Data NaT Page Consumption fault
Disabled Floating-point Register fault Data Key Miss fault
Register NaT Consumption fault Data Key Permission fault
Unimplemented Data Address fault Data Access Rights fault
Data Nested TLB fault Data Access Bit fault
Alternate Data TLB fault Data Debug fault
VHPT Data fault Unaligned Data Reference fault
Data TLB fault Unsupported Data Reference fault
Data Page Not Present fault