Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1255 / 1898

3:356 Volume 3: Instruction Formats
4.5.3.2 Break/Nop/Hint (B-Unit)
B9
4.6 F-Unit Instruction Encodings
The floating-point instructions are encoded in major opcodes 8 – E for floating-point
and fixed-point arithmetic, opcode 4 for floating-point compare, opcode 5 for
floating-point class, and opcodes 0 and 1 for miscellaneous floating-point instructions.
The miscellaneous and reciprocal approximation floating-point instructions are encoded
within major opcodes 0 and 1 using a 1-bit opcode extension field (x) in bit 33 and
either a second 1-bit extension field in bit 36 (q) or a 6-bit opcode extension field (x
6
)
in bits 32:27. Table 4-59 shows the 1-bit x assignments, Table 4-62 shows the
additional 1-bit q assignments for the reciprocal approximation instructions; Table 4-60
and Table 4-61 summarize the 6-bit x
6
assignments.
vmsw.0
p
0
18
vmsw.1
p
19
40 37 36 35 33 32 27 26 25 6 5 0
0/2 i x
6
imm
20a
qp
4 1 3 6 1 20 6
Instruction Operands Opcode
Extension
x
6
break.b
e
imm
21
0
00
nop.b
2
hint.b 01
Table 4-59. Miscellaneous Floating-point 1-bit Opcode Extensions
Opcode
Bits 40:37
x
Bit 33
0
0 6-bit Ext ( Table 4-60 )
1 Reciprocal Approximation ( Table 4-62 )
1
0 6-bit Ext ( Table 4-61 )
1 Reciprocal Approximation ( Table 4-62 )
Instruction Opcode
Extension
x
6