Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 550 / 1898

2:302 Volume 2, Part 1: Processor Abstraction Layer
After return from the SAL rendezvous call, PALE_CHECK will complete processing the
machine check if the rendezvous was successful and then branch to SALE_ENTRY with
GR19 set to zero. The processor state when transferring to SAL is as defined in
Section 11.3.2, “PALE_CHECK Exit State” on page 2:297 . If the rendezvous failed
PALE_CHECK will simply construct the Processor State Parameter and branch to
SALE_ENTRY.
Any further discussion of multiprocessor rendezvous, including platform requirements
and implications, is beyond the scope of this specification. See the relevant SAL/Error
handling documents for further information.
11.3.2.3 Unconsumed Data-Poisoning Event Handling
If, during the transfer/access of information between levels of the cache/memory
hierarchy, there is data found to have an uncorrectable error and is marked poison,
error reporting events may be raised. If such an error event is sent to a processor that
doesn't consume the corrupted data, then the error is termed an
unconsumed
data-poisoning event .
Unconsumed data-poisoning events are by default reported as a CMC and can
optionally be promoted to an MCA via bit 53 of
feature_set 0 of
PAL_PROC_SET_FEATURES. When they are signaled as a CMC the PSP.cm is set to 1 to
indicate that the error has been corrected (in the sense that the line has been marked
poison, preventing any silent data corruption).
If bit 53 is 1, unconsumed data-poisoning events are reported as MCAs. To immediately
report unconsumed data-poisoning events as
uncorrected errors (in the sense that
the data in question has been lost), the caller can set bit 53 to 1. PSP settings for a
data-poisoning event with bit 53 equal to 1 are given in the table below. See also
Table 11-8 .
When promotion is enabled (bit 53 is 1), and a continuable data-poisoning event is
indicated (i.e., the PSP bits are set as in the above table, and either cache_check.dp,
bus_check.dp or both are 1), and if no other MCAs occur at the same time (i.e., no
other errors are indicated in the error information from PAL_MC_ERROR_INFO), the
interrupted process is always continuable. Promotion to MCA with bit 53 allows the OS
to take proactive measures to recover from the poisoned data, but this is not required
for the interrupted process to be continuable.
11.3.2.4 Processor Min-state Save Area Layout
The processor min-state save area is minimally 4KB in size, but an implementation may
require larger sizes. The reset hand-off state indicates if a size greater than 4KB is
required and also provides the required size. Please refer to
Section 11.2.2.1,
“Definition of SALE_ENTRY State Parameter” on page 2:291 for more information on
the reset hand-off state. The required size is referred to as MIN_STATE_REQ. The
min-state save area is required to be in an uncacheable region. The first 1KB of this
Table 11-9. PSP Bit Settings for Unconsumed Data-poisoning Events on
MCA
cm us ci co sy
0 0 1 1 0