Volume 2, Part 2: MP Coherence and Synchronization
2:531
2.5
Updating Code Images
There are four general techniques for updating code images in order to modify the code
stream of a local or remote processor.
• Self-modifying code or code that modifies its own image.
• Cross-modifying code or code that modifies the image of code running concurrently
on another processor.
Figure 2-7.
Lamport’s Algorithm
// The proc_id variable holds a unique, non-zero id for the process that
// attempts access to the critical section. x and y are the synchronization
// variables that indicate who is in the critical section and who is
// attempting entry. ptr_b_1 and ptr_b_id point at the 1’st and id’th
// element of b[].
//
lamport:
ld8
r1 = [proc_id] ;;
// r1 = unique process id
start:
st8
[ptr_b_id] = r1
// b[id] = “true”
st8
[x] = r1
// x = process id
mf
// MUST fence here!
ld8
r2 = [y] ;;
cmp.ne
p1, p0 = 0, r2;;
// if (y != 0) then...
(p1)
st8
[ptr_b_id] = r0
// ... b[id] = “false”
(p1)
br.cond.sptk
wait_y
// ... wait until y == 0
st8
[y] = r1
// y = process id
mf
// MUST fence here!
ld8
r3 = [x] ;;
cmp.eq
p1, p0 = r1, r3 ;;
// if (x == id) then...
(p1)
br.cond.sptk
cs_begin
// ... enter critical section
st8
[ptr_b_id] = r0
// b[id] = “false”
ld8
r3 = [ptr_b_1]
// r3 = &b[1]
mov
ar.lc = N-1 ;;
// lc = number of processors - 1
wait_b:
ld8
r2 = [r3] ;;
cmp.ne
p1, p0 = r1, r2
// if (b[j] != 0) then...
(p1)
br.cond.spnt
wait_b ;;
// ... wait until b[j] == 0
add
r3 = 8, r3
// r3 = &b[j+1]
br.cloop.sptk
wait_b ;;
// loop over b[j] for each j
ld8
r2 = [y] ;;
cmp.ne
p1, p0 = r2, r1 ;;
// if (y != id) then...
(p1)
br.cond.sptk
cs_begin
// ... enter critical section
wait_y:
ld8
r2 = [y] ;;
// wait until y == 0
cmp.ne
p1, p2 = 0, r2
(p1)
br.cond.spnt
wait_y
br
start
// back to start to try again
cs_begin:
// critical section code goes here...
cs_end:
st8
[y] = r0
// release the lock
st8.rel
[ptr_b_id] = r0;;
// b[id] = “false”
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...